Herb, thanks as always for continuing to be a 3D/2.5D evangelist. I am a bit surprised that the 2.5D stacks are still more than an year away from production ramps and that too from a limited numbrer of players. Could it be that there are many more that are actively developing and perhaps chosen not to publicize their projects?
Can you write more on the reliability studies of SK Hynix HBM devices? This would be very valuable for us 3D enthusiasts since that data is hard to come by for products already in the market (like those of Samsung!).
For your and others' benefits, let me elaborate more on the SK Hynix presentation, given by my friend Minsuk Suh:
- SK Hynix offers a range of memory stacks: A low-power configuration (Wide I/O), a high performance stack (HMC) for economical support of CPU designs and an ultra high-bandwidth configuration (HBM) for graphics applications. In addition, SK Hynix introduced a 64 GB LRDIMM module earlier this year.
- This high density and high performance module passed 1000 temp cycles (0 to 125 oC).
- For the 3D memory stacks Minsuk showed that they passed Preconditioning, HTOL, 1000 Temp cycles (-55 to 125 oC ! ), 1008 hr of HTS at 180 oC and HAST at 130 oC with 85% RH for 336 hours.
I heard from several large companies that they already received samples earlier this year and are designing 2.5D solutions with them.
Herb, SK Hynix's reliability highlight is great to know, thanks! I hope at some point the data including Weibull / FITs will be published in technical journals. I assume SK also achieved significant savings in IO power consumption in the WideIO designs.
Minsuk did not quote specific power savings in his SK Hynix presentation this time.
Depending on what you use to compare it (interconnect power only / interconnects and I/Os / Chip-level comparison / sub-system comparison) you get different ratios. Based on what I learned in other presentations, I can assure you that Wide I/O 1 beats LPDDR3 and Wide I/O 2 beats LPDDR4 in regards to Bandwidth per mWatt.
FYI: Samsung is calling the WideI/O standard internally "Widcon" (for WIDe CONnection) and it utiling it in the Exynos 5 volume production. See more about it at:
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.