Yes, I agree. Having the tools and the knowledge to use them really helps in getting it right the first time.
One thing that I've found though is that one of the biggest factors in getting it right is to have good design reviews. After the last few designs that I did (where we DID get it right the first time) I'm convinced that you can't have too many reviews and you really need to have the right kind of reviews with the right people (engineers with expertise in the area that is being reviewed). I had the project manager breathing down my neck because we were late getting the PCB design done and ended up with the project finishing ahead of schedule becuase we didn't need the second PCB spin.
Once upon a time our saying was "All below 10MHz is "continuous current" ... I made a real lot of boards without any simulation and got them right the first time ... up to 270MHz LVDS transfer of video data, with a lot of analog stuff like genlocking, etc. Of course working PCI bus interfaces and a real lot of digital data processing for professional TV station equipment. This went up to 8 layers and a size comparable to todays largest PC graphics boards. Plenty of SMD chips on both sides with up to about 500 pins (or balls) ... all that about 15 years ago. All I needed was the schematics, the PCB layout, the PLD design software and later the FPGA stuff from Xilinx. I also, just once, went up to about 400MHz for something (I believe a satellite receiver board) and even then it worked first time and without any simulation be it power or thermal or whatever. So you CAN work with just schematic and PCB layout tool (most of the time integrated anyway) and of course if you use programmable logic you need to be able to "compile" the VHDL (or Verilog or whatever) for them, but I did my pin-swapping in advance in my head and on paper (and believe me it didn't take long and I always used my chips resources to the limit.). Sorry, but I believe that to some extend it's a question of talent (pls forgive the bragging).
I had someone say to me yesterday that,"clock nets should be routed shortest as a rule of thumb." I thought about this and it didn't quite ring well for me. I realize clks need to be routed cleanly with minimal angles and vias. Terminated. But I'd think Address and Data should be routed the same lenghts within +/-.150" tolerences if possible. And clock should be equal or slightly longer. The thinking being that the clocking edge should arrive just after data/addr setup, but still allowing hold time before data/addr changes for the next active clk edge.( the timing might also be controlled in the system so skews should be minimized ) Is there such a rule of thumb? ( 6"fr4 ~= 1ns prop )
Then to make things more murky I found these appnotes and on page 16 of each they contradict each other:
If you really understand PCB engineering, you will eventually locate tools to help clear various "hurdles" of typical problems that will arise. A good set of tools and the understanding to apply them will allow you to produce a 100% functional board in ONE revision (assuming less than 500 parts). Since the lead time to produce a board at reasonable cost is usually a few weeks - it is better approach to spend an extra few days looking at crosstalk, paracitic capacitance, trace impedance, loop area ect. The physics of how a physical version of a circuit is well known and thus tools have been developed to help us engineers "see these problems". Until you get to frequencies above 100Mhz, a prototype is useful primarily in optomizing component values, rather than determining a need to revise traces on the board.
I've actually designed very simple PCBs using just the layout tool and instructions from the mechanical engineer (who presumabley had some sort of 3D model) Of cours I'm talking about small boards with a couple sensors and pads to hook up the wires. For anything more complex I'll at least use the schematic capture. For most hobbiest stuff you probably don't need much more although I always seem to have to create at least one new part in the library. As Aeroengineer said, these capibilities are merging at the hobiest level so they see it as one package.
On the other hand if you want a complex design to work when it's produced by the thousands then you need to start using the analysis tools.
In my day job, I need to do power and thermal analysis and usually digital/ analog simulation, signal integrety and EMC/EMI on every design. I haven't gotten into the mechanical aspects or FPGA design so I don't personally use those tools but I use the results that are generated.
One of these days, I'll actually have time to do one of the "hobbiest" projects I've been contemplating. Probably something with LEDs...
As we unveil EE Times’ 2015 Silicon 60 list, journalist & Silicon 60 researcher Peter Clarke hosts a conversation on startups in the electronics industry. Panelists Dan Armbrust (investment firm Silicon Catalyst), Andrew Kau (venture capital firm Walden International), and Stan Boland (successful serial entrepreneur, former CEO of Neul, Icera) join in the live debate.