I had someone say to me yesterday that,"clock nets should be routed shortest as a rule of thumb." I thought about this and it didn't quite ring well for me. I realize clks need to be routed cleanly with minimal angles and vias. Terminated. But I'd think Address and Data should be routed the same lenghts within +/-.150" tolerences if possible. And clock should be equal or slightly longer. The thinking being that the clocking edge should arrive just after data/addr setup, but still allowing hold time before data/addr changes for the next active clk edge.( the timing might also be controlled in the system so skews should be minimized ) Is there such a rule of thumb? ( 6"fr4 ~= 1ns prop )
Then to make things more murky I found these appnotes and on page 16 of each they contradict each other:
Once upon a time our saying was "All below 10MHz is "continuous current" ... I made a real lot of boards without any simulation and got them right the first time ... up to 270MHz LVDS transfer of video data, with a lot of analog stuff like genlocking, etc. Of course working PCI bus interfaces and a real lot of digital data processing for professional TV station equipment. This went up to 8 layers and a size comparable to todays largest PC graphics boards. Plenty of SMD chips on both sides with up to about 500 pins (or balls) ... all that about 15 years ago. All I needed was the schematics, the PCB layout, the PLD design software and later the FPGA stuff from Xilinx. I also, just once, went up to about 400MHz for something (I believe a satellite receiver board) and even then it worked first time and without any simulation be it power or thermal or whatever. So you CAN work with just schematic and PCB layout tool (most of the time integrated anyway) and of course if you use programmable logic you need to be able to "compile" the VHDL (or Verilog or whatever) for them, but I did my pin-swapping in advance in my head and on paper (and believe me it didn't take long and I always used my chips resources to the limit.). Sorry, but I believe that to some extend it's a question of talent (pls forgive the bragging).
Yes, I agree. Having the tools and the knowledge to use them really helps in getting it right the first time.
One thing that I've found though is that one of the biggest factors in getting it right is to have good design reviews. After the last few designs that I did (where we DID get it right the first time) I'm convinced that you can't have too many reviews and you really need to have the right kind of reviews with the right people (engineers with expertise in the area that is being reviewed). I had the project manager breathing down my neck because we were late getting the PCB design done and ended up with the project finishing ahead of schedule becuase we didn't need the second PCB spin.
At the end of the day (how trite), we need to consider the manufacturability of the PCB. Design constraints for vias, trace widths, trace bends, trace spacing, impedance matching, component placement guidelines, recommended component footprints, implementation of EMC metal covers, etc. Many of these can be impemented in design checking software, but as stated by others, a rigorous design review process including manufacturing representation is a must. And don't forget a vibration analysis of the PCB mounting.
I remember in the distant past a fairly interesting package for this called Touchstone made by someone called EEsof. The company was acquired by Hewlett-Packard and the program since morphed into Lisa then into what's now called Advanced Design System (ADS). This was just the sort of thing to use if you wanted to actually lay out an antenna as part of your PCB. I remember how part of it worked, you could put a cutting pin into a plotter instead of a pen then you'd lay your rubylith sheet down on the plotter surface and cut it, then you could plaster the rubylith down on a metal sutface and etch away in an acid bath (well look this was pretty hot technology back in about 1986!). No really it could also do a complete analysis on a design as well as some synthesis, I just can't recall exactly how you entered the description, might have been an ACAD DXF representation, I believe there were a number of options. I looked at it with envy but never got a chance to work with it, but considering you could get analysis at extremely high frequencies back then with the ease and precision we would now expect at low frequencies with SPICE, it was pretty far ahead of its time. I doubt this would be an affordable package to experiment with though even now.
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.