Just as in real estate it's location, location, location, in PCB it's layout, layout, layout.
1. Component location. The first objective is to keep signal traces as short as possible, and keep digital and other noisy components away from your analog components. I have yet to see an auto-location program that seems to have even the smallest clue in this regard. That's because the permutations are computer boggling though relatively easy for the human mind to comprehend. It's been my experience if components are carefully laid out to minimize trace lengths, an auto-routing program will take a second rather than overnight.
2. Signal traces. In sensitive analog circuits (they're all sensitive) keep digital signals and noisy supply rails well away. Don't even cross them on the other side of the board. Auto-routing will kill you here.
3. Power and ground traces. Improper layout of these can destroy everything you've gained in 1 and 2. Power supply traces have to be laid out to keep impedances at a minimum. (Some badly laid out boards can be saved by simply increasing the weight of the board's copper). Again, keep digital supply lines well away from analog circuitry. Grounding layout is crucial. Carefully examine your board and visualize where your heaviest ground currents are flowing, especially noisy ones. You may have to put cuts in your ground plane, if you're using one, to keep these currents away from your analog circuitry. It's amazing what you can see just probing the ground and supply traces with a 'scope on the average PCB.
If you do a proper layout, your 24 bit A/D should consistently roll over its LSB at the 1/2 LSB point.
What you provide is a goood list of tools which are needed to design the schematic once you know what the re requirements are.
Prior to that there is always the upfront system engineering effort which will look at things like
a) customer requirements
b) derived requirements
c) subsystem segmentation - what is implemented by HW, SW, FPGA etc
d) interface control documents etc
This typically requires tools such as
1) Requirements capture
2) Model based engineering tools - Sysml, UML etc
Then there is the modeling of the system performance to ensure it can meet requirements typically tools like Matlab or Octave are used
Once you have started a design you will need a product life cycle management tool to enable the storage of design and documentation with a proper engineering change request loop.
At the schematic level there is also the timing level simulation which can be needed for the PCB as well. There is also the design rule checkers for PCB;s layout these can implement company rules along with design rules from the PCB manufacturer to ensure your design can be manuactured with a good yield.
It is an area close to my heart as I am currently tasked with creating a new engineering team and capability and it is no small nor inexpensive task.
That's a pretty good list of tools that may be involved in a PCB layout. Now, I'm not going to use any 3D CAD tools, that's for the mechanical engineers on my project. But I'll certainly use their output to shape PCBs and place connectors, and feed back a 3D model so they can check for fit.
I'd like to see RF tools on the list. Sure, most advanced PCB design programs let me route in ohms instead of mils, but it's still worth checking against a dedicated program. As well, if you're using drawn components (PCB filters, antennas, etc), that's way beyond the ability of most PCB layout programs to deal with.
Based on both Technical Notes stating that the clock signal has "a shorter flight time" and the DDR3 TN being later (2009 vs. 2005, and likely copy-pasted from a more up-to-date document), I would guess that the earlier DDR2 document is in error ("sense inversion" errors like longer vs. shorter are not uncommon and can be difficult for a knowledgeable person to catch because they know what is meant). Presumably even with "the ability to prelaunch the address and control signals", there is a need for the faster signal to be given extra delay, so the clock path should be "slightly longer".
(I am not an EE; I base the above only on context.)
VERY good point. Design reviews help catch a lot of stuff, and the earlier, the cheaper :-) Another thing you allude to is often stated, "Measure twice, cut once." I note that some (not many, I hope) larger companies are reticent to put in the simulation/checking/review time up front, with the aim of cutting out a prototype spin and therefore finishing the overall project faster. At one job I was actually ordered to rush a design (taking just a few days), with few simulations and checks, rather than take a bit longer and get it right the first time, because we "would fix any issues in the respin." I never heard the phrase "first-pass success" there, and attempts to introduce it were quashed.
I remember in the distant past a fairly interesting package for this called Touchstone made by someone called EEsof. The company was acquired by Hewlett-Packard and the program since morphed into Lisa then into what's now called Advanced Design System (ADS). This was just the sort of thing to use if you wanted to actually lay out an antenna as part of your PCB. I remember how part of it worked, you could put a cutting pin into a plotter instead of a pen then you'd lay your rubylith sheet down on the plotter surface and cut it, then you could plaster the rubylith down on a metal sutface and etch away in an acid bath (well look this was pretty hot technology back in about 1986!). No really it could also do a complete analysis on a design as well as some synthesis, I just can't recall exactly how you entered the description, might have been an ACAD DXF representation, I believe there were a number of options. I looked at it with envy but never got a chance to work with it, but considering you could get analysis at extremely high frequencies back then with the ease and precision we would now expect at low frequencies with SPICE, it was pretty far ahead of its time. I doubt this would be an affordable package to experiment with though even now.
At the end of the day (how trite), we need to consider the manufacturability of the PCB. Design constraints for vias, trace widths, trace bends, trace spacing, impedance matching, component placement guidelines, recommended component footprints, implementation of EMC metal covers, etc. Many of these can be impemented in design checking software, but as stated by others, a rigorous design review process including manufacturing representation is a must. And don't forget a vibration analysis of the PCB mounting.
Replay available now: A handful of emerging network technologies are competing to be the preferred wide-area connection for the Internet of Things. All claim lower costs and power use than cellular but none have wide deployment yet. Listen in as proponents of leading contenders make their case to be the metro or national IoT network of the future. Rick Merritt, EE Times Silicon Valley Bureau Chief, moderators this discussion. Join in and ask his guests questions.