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Re : Want to Join Me in the EDA Playground?
Anand.Yaligar   1/30/2014 1:44:35 PM
@Max, thanks a lot for sharing this tool details. I will definitely use this online tool to simulate my code.

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Re: Cart before the horse
Garcia-Lasheras   1/17/2014 8:09:46 AM
Congratulations Victor!! This is a really cool tool. I've been playing with some simple VHDL examples using Modelsim simulator and it works like a charm.

I like the feature that allows saving the code. Maybe some people could be afraid of logging with Google or Facebook private account, but this is mandatory too for a lot of online apps that are far from being as useful as EDA Playground is -- I believe this is a fair way of getting funded ;-)

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Re: Cart before the horse
getvictor   1/16/2014 3:29:07 PM
antedeluvian, you bring up a good point regarding self-learning material. EDA Playground is a platform where examples, tutorials, and hands-on labs can be hosted by EDA companies, training companies, or even individuals. However, so far the content is light. There is a tutorial for a cocotb testbench, the SVUnit tutorial mentioned in the article, and several Verilog video tutorials

We're looking for collaborators such as universities to create some quality comprehensive self-learning material.

Have you ever sat through a presentation where code snippets were shown in a Powerpoint slide? From my experience, I forget all about it when the slide is changed. Code should be run and be modified. There is no reason why every HDL training shouldn't be interactive.

Duane Benson
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Very interesting
Duane Benson   1/16/2014 2:31:44 PM
I'm becoming more and more of a fan of online development tools. The category is still in its infancy, but I've already seen some pretty handy tools. The mbed online IDE being the best example.

This could be a good step in that direction for the programmable logic world. I'll check it out when I have a chance.

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Thanx Max
DrFPGA   1/16/2014 12:21:54 PM
Looks like a very useful tool worthy of a more detailed look. I will play with it a bit and report back.

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Cart before the horse
antedeluvian   1/16/2014 11:40:52 AM
This looks a remarkably powerful tool and Victor Lyuboslavsky is to be commended for making it freely available. I did follow the first tutorial and I was impressed at the presentation of the app (which is simple and uncluttered) and its linkage/compatibilty to many toolsets. I must admit though that some of it was over my head since my experience of any HDL was with AHDL (Altera's version of VHDL) at least 15 years ago.  

What I would need (and advice is welcomed) is a suggestion for reading/self-learn matter that would take up to the point where I could actually use EDA Playground. It is possible on PSoC3/5 to define your own modules using Verilog and I would really like to get up to speed so that I can attempt that.

As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.

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