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jbeniston
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Re: Good for new developments
jbeniston   2/3/2014 6:11:24 AM
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It's a good question. A bit like in the article, where the quote from Cast says it is 26.85x faster, and only 7k gates. Yet if you look on Cast's web site, the 7k gate version of the S8051XC3 is only 9.4x faster, and the 26.85x faster version is actually 11.5k "minimum". I.e. it will be much larger when synthesized to a higher frequency, or in an older process. It's a game all CPU vendors play.

ndzervas
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Re: Good for new developments
ndzervas   2/3/2014 5:47:54 AM
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@Sanjib.A: The 8051 cores are not only used for replacing microcontrollers. They are heavily used in modern designs,  (e.g. sensors, RF or analog front-end control and calibration,  light-weight packet processing,  housekeeping in complex SoCs etc) due to their small silicon footprint, energy efficiency, ease of use and lack of royalties. The increased performance makes them suitable for a wider range of applications/tasks.  

ndzervas
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Re: Good for new developments
ndzervas   2/3/2014 5:33:37 AM
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True, BUT the eSi-1600 being a 16bit CPU based on a proprietary ISA, can not run 8051 code. The nice thing with 8051 cores, is that you can run your legacy code and exploit the pretty broad ecosystem (software stacks, IDEs, dev kits etc).

Also, I would be careful with publicly available specs for processor, especially when they are in the form of "up to 1.02 DMIPs/MHz" and "from 8.5K gates" (these are taken from the eSi-1600 page). I wonder what is the area when the performance is 1.02 DMIPs/MHz, or what is the performance when the area is 8.5kGates?....

ndzervas
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ndzervas   2/3/2014 5:22:29 AM
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This is a great point!

In case of legacy software with software timing loops (that can not be replaced for whatever reason), the best choice is an IP core that is explicitly designed to match timing (i.e. number of cycles per instruction) of the original architecture. CAST has such a core, the L8051XC1, if anyone would be interested. This one allows configuration of the number of cycles per instruction, to allow timing compliance with more or less any 8051 architecture.

prabhakar_deosthali
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prabhakar_deosthali   1/31/2014 8:14:48 AM
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This new faster CPU may not work well with the old 8051 development platforms because of the timing problems.

The timing problems will be more apparent for the old software which uses software loops to count timing and and delays in the processing.

Kinnar
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Re: Good for new developments
Kinnar   1/30/2014 2:13:00 PM
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Interesting to know that still companies are working to improve performance of the conventional basic micro-controller 8051. 

@Sanjib these improvement will not be feasible to be used in the existing device in-terms of replacing the chip, but infect they will be more useful in the upgraded board designs based on 8051.

jbeniston
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Re: Good for new developments
jbeniston   1/29/2014 9:52:04 AM
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0.25 DMIPS/MHz isn't much comparatively. EnSilica's eSi-1600 will get you over 1 DMIPS/MHz for a similar gate-count and will synthesize to higher frequencies.

Sanjib.A
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Good for new developments
Sanjib.A   1/28/2014 1:04:29 PM
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Hi Max, not sure if increasing speed would matter much. 8051 was a very popular microcontroller even before few years back, but those application did not demand such high speed. The CAST core would be useful for replacing the obsolete 8051 controller chips with FPGA. The designer would need to be careful for not to increase the speed beyond certain frequency in order to avoid timing violations if the FPGA and the core is used on an old design replacing the obsolete 8051 chip. It is good that the 8051 core has a high speed, but not sure if people will buy that for increased speed. 



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