My first reaction was that Spansion is late to the SoC game, but the strategy of specializing on the automotive space might turn out to be a very good idea. It seems like there is a surge in the sophistication of the onboard systems in automobiles that could be a good opportunity for a company willing to focus on them. This would be a change from many semiconductor companies that try to be all things to all customers.
Many of today's MCU's and SoCs integrate some non-volatile memory. But suppliers of those SoCs are not able to scale the memory cells and its performance to keep pace with their advancements in logic design.
If Spansion's memory expertise can efficiently scale the embedded memory, it will certainly help their logic design. After all, not many logic design companies do not have memory expertise.
I've read somewhere that the non-volatile memory is becoming a higher percentage of the overall die. If so, it would end up in a sub-optimal logic process and larger, more costly die sizes.
thank you Junko...I thought the problem was the flash uses different processing steps than logic...so the CMOC process that can do both flash and logic would be more expensive negating the benefit of having flash technology in your pocket...Kris
Embedded Flash adds 6 to 8 masks to a logic process. Many MCUs include Flash and most MCU manufacturers and most foundries have embedded Flash options of varying densities. Stand alone NOR Flash (Spansions specialty) is a much smaller market than NAND Flash and is shrinking so this is probably an attempt to develop a growth strategy.
thank you...extra 6 to 8 processing steps sounds like a significant cost adder to me, 20%? 30%?...are you sure that integrated embedded flash chip is a winning proposition against two chips (flash+logic) fabricated in their respective process flavours? Kris
It is true that the flash process will add cost to the integrated solution, but the advantages outweigh the added cost. Having a single die instead of two reduces the system cost and increases the reliability. It also reduces the footprint required on the circuit board. The flash will usually be more than half the die so you should think of this as adding logic to a flash chip instead of adding flash to a microcontroller. The disadvantage is that the feature size of the logic will be lagging the industry in the combined process, so your logic will be larger than it would be on a stand alone chip. As mentioned, the speed of reading and writing the flash will improve since it does not go off chip.
>> There are many SoC companies out there. Few have memory technologies....
Multi-die integration is starting to become interesting. XMOS is selling a mult-die mcu for less than $5 , media tek works on it's new wearable soc using mutiple die tech(and it has a done an impressive multi-die integrated microprocessor for low end phones for $3).
@alex-m1, you shed an interesting light here. Yes, MTK's wearable solution ("Aster") is a multi-die solution. How that might change the SoC narrative is a good story to follow. Thanks for pointing that out.
The Fujitsu Semiconductor acquisition in August is paving the way for Spansion's development of new SoCs integrating dissertation writing service Spansion's embedded flash technology with MCU, analog, and power management ICs.
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.