@AZskibum: "I'm curious what tools all you "I love asynchronous logic" guys are using to implement and verify your designs."
Well, last week I used standard VHDL in order to describe a 4000 stages-depth asynchronous micropipeline in the Xilinx Zynq device that powers my Zedboard. No strange circuitry, tools.... just PlanAhead+Xise+plain HDL description.
P.S.: Sorry for my late reply, I missed this post!!
@tb100: "You would almost think that Intel was up to something!"
Very impressive!! You really manage to stay on top of things!!
But I would add one more deal: Intel funded Silistix, a Manchester Unversity start-up leaded by Steve Furber (one of the original ARM architects) and which focused in the development of an asynchronous On-Chip core interconnect.
You can find more info in the next Silistix Limited website -- where references to Intel has been convenently suppressed, of course ;-)
Intel has been involved with a number of asynchronous logic companies. They bought Fulcrum, which has a number of chips, including Ethernet switches, that use asynchronous logic inside. And they partner with Achronix, which makes FPGAs that utilize asynchronous techniques for internal data pipelining.
You would almost think that Intel was up to something!
Clock gating is also supported in most of the clock buffers in Xilinx 7 Series devices, e.g. in global clock buffers (BUFG) and horizontal clock buffers -- a regional clock distribution network -- (BUFH).
You can also select a lot of different clock inputs for each different clock distribution network, including internally generated clocks.
Ther is more info about this in the next user guide:
@Max: "I remember a time when I thought Sun Microsystems would be around for ever ... it's like the old saying goes: "The bigger they are, the harder they fall" -- it was a sad day when they disappeared :-("
Yes, a very sad day. I really loved SUN Microsystem: its technology, both hardware and software, its openness, its advanced research... Some people think that they were too smart, commited and professional for staying alive in these weird days we are living now.
As we unveil EE Times’ 2015 Silicon 60 list, journalist & Silicon 60 researcher Peter Clarke hosts a conversation on startups in the electronics industry. Panelists Dan Armbrust (investment firm Silicon Catalyst), Andrew Kau (venture capital firm Walden International), and Stan Boland (successful serial entrepreneur, former CEO of Neul, Icera) join in the live debate.