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May be photonic connections can compete with prof. Kuroda
jasiojasiojasio   2/22/2014 11:14:49 AM
Of course there are no silicon lasers. But there are modulators (need CW light to power them) some of them literally micron size and very fast photodiodes. For 1500 nm light to propagate through that ~ 50 um thich wafer one of stack is easy. Light will go right through and do not wreck any havoc inside the die (1 layer). The dimensions of needed diffraction gratings will be way smaller than  sizes of RF links and silicon photonics can offer WDM on one beam. Given speed of those structures and very small size (and a few lasers bonded to top of 3-D structure) the throughput looks better than is wireless connection. Power consumption poses no problem. The crosstalk problem is way more easier to solve. Besides light beam goes through another and they are preserving their parameters. All these CMOS compatible. Thank you.

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alex_m1   2/22/2014 11:07:00 AM
Since they claim it's very inexpensive , does it fit microcontrollers , for integrating digital and analog dies or digital and flash dies ,for example?

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Re: Your take
DrFPGA   2/21/2014 11:35:44 PM
If SerDes are needed it will dramatically increase the amount of circuitry required. Perhaps a better approach would be to use something like a memory array of inductors. Anyone else remember core memory?

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Re: both wireless and TSV stacks have merits
tb100   2/21/2014 9:47:36 PM
Die are stacked for desnity reasons, not for price. Sometimes you just need more memory than will fit on a board, or on the DIMMs in your already full DIMM sockets. If these DIMMs already have the densest die, then you are out of luck--unless a vendor offers stacked die.

This is also used by FPGA companies to increase density or to add analog functions (ultra high-speed SerDes) to a digital chip.

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Re: Your take
chipmonk0   2/21/2014 5:45:15 PM
Great approach ! If it works then certainly beats doing root canal ( TSV ) on finished chips. But I am wondering if the chip to chip data transmission is going to be parallel or serial ?  If it is the former then how about SSN and Signal Integrity ? If serial then will it be like SerDes and require adding the necessary circuitry to ea. chip ( in addition to the pulse creating and sensing circuits ) ? In either case what physics would limit the Bandwidth ?

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Re: both wireless and TSV stacks have merits
buprestid   2/21/2014 5:14:34 PM
Can someone explain how 3-D stacking saves money, because the silicon die cost remains the same.

Is it primarily with the packaging cost? If so what percentage of the cost is packaging?

rick merritt
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Your take
rick merritt   2/21/2014 1:18:55 PM
I invite engineers interested in 3-D chip stacks to examine the foils from ThruChip and give your take on this approach.

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both wireless and TSV stacks have merits
wilber_xbox   2/21/2014 12:47:23 PM
The main problem in wireless is, as metioned, the manufactring of the coils. However difficult it may sound, if the cost and complexity is less in wireless stacking then TSV will be difficult to implement. Stacking seems like the only way to keep Moore's law in relevance.

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