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resistion
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CEO
Resistance
resistion   2/25/2014 4:15:46 PM
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I cannot avoid finding larger resistance for coil than TSV. Plus larger area, I'm not sure the advantage.

resistion
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CEO
Parallel alternative
resistion   2/25/2014 7:49:32 AM
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Actually besides these options, need to think about the use of extended mutual inductance, of course there could be cumulative losses from more being linked together to extend the distance.

Kinnar
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CEO
Re: Your take
Kinnar   2/25/2014 2:07:01 AM
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The authors of that paper were, Yoshida, Y. Keio Univ., Fujisawa, Nose, K. ; Nakagawa, Y. ; Noguchi, K. ; Morita, Y. ; Tago, M. ; Kuroda, T. ; Mizuno, M.

 

resistion
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CEO
Re: Your take
resistion   2/25/2014 1:08:32 AM
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Practically, a coil probably takes up the space of multiple TSVs, so I would expect either SerDes or FDM to be necessary.

resistion
User Rank
CEO
Re: Wireless power?
resistion   2/24/2014 11:56:02 PM
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Yes, the coil impedance losses and required dimensions are nontrivial considerations in the design. On the other hand, TSVs are not a walk in the park either. I think the potential to NOT continually thin the silicon is quite promising. Not to mention the fragility or increased thermal risk, but there is less competitive difference from monolithic approaches.

DrQuine
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CEO
Communicating between stacked chips
DrQuine   2/24/2014 9:58:13 PM
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I wonder about the "potential" for external electromagnetic interference. Slight offsets in positioning might also result in changes of signal amplitude with the risk of digitizing errors. Would it be better to use light communication between the chips (optoisolators)? When encased, there would be no risk of interference, slight offsets or changes in separation would not be an issue, and very high frequency signals could be conveyed without any inductance issues.

DougInRB
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Manager
Re: Your take
DougInRB   2/24/2014 2:40:28 PM
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Hmmm.  It has been many decades since EE school, but if I remember EE101 correctly -  you need a change in current on one side to induce a change in voltage on the other side.  A SERDES is one way of doing this, but since we have been told (in this article and subsequent comments) that it is a simple circuit to do this, I had to dig deeper.

Then I found a paper in ISCC 2009 titled "Wireless DC Voltage Transmission Using Inductive-

Coupling Channel for Highly-Parallel Wafer-Level Testing".

 

This paper explains how it can be done.  The application in this case was for wafer-test, but the principles are the same.

Guess who one of the contributing authors is?

 

Tamza2
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Rookie
Re: both wireless and TSV stacks have merits
Tamza2   2/24/2014 1:13:09 PM
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It is NOT just a matter of silicon cost, but cost at the system level. And even more so, even a 'feasibility' of certain applications. Besides the manufacturing headaches in executing a true 3D structure one is also faced with several others that may be the 'brick wall': yield, thermal, reliability, even FA.

zewde yeraswork
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Blogger
Re: Wireless power?
zewde yeraswork   2/24/2014 12:15:04 PM
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the issue of the quality of the transistor cannot be overstated

zewde yeraswork
User Rank
Blogger
Re: Wireless power?
zewde yeraswork   2/24/2014 12:12:42 PM
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There are questions involving the size of coils, aligning coils and eliminating interference between chips that will continue to dog efforts to use wireless chips.

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