Thanks Nonvolatile, I was not sure if Panasonic used the Ferroelectric NV memory or a RRAM, so I needed to check, thanks again for the clarification. If I am really honest I was also distracted by my new found interest in the link between NV memory and Dentistry, see the other paper. It just goes to show for all those folks working on moving ions and atoms around to make a NV memory if they fail to make the grade there lessons learned might be applicable elswhere. Nothing learned is ever wasted.
Micron already had a PCM product, but yanked it off later. One problem is the very high RESET current, or RESET voltage much larger than SET voltage. Other unipolar RRAMs, they don't have the high RESET current, but their RESET is quite slow, much slower than SET.
Well, at any rate, I think we're running out of time. All you engineers with your noses to the grindstone may not have noticed that we've got too many people and we're running out of oil and oil is what got us here.
Richard Heinberg is a crystal clear presenter:
Peter Wadhams is one of the world's leading sea-ice scientists.
The sea ice crash and petroleum crash are going to hit at about the same time, in the next few years. That's soon.
Just a heads-up. The science is quite interesting, too.
Shockley22:- "Time from idea to product was fast." You are right and that is absolutely key point and is a serious measure of likely success of any new technology. Time to product is directly proportional to the number of hidden or unanticipated problems.
Shockley22 Is tunneling a high energy process? For ReRAMs/RRAMs we are talking about moving ions and atoms and buiding up concentration gradients. In Flash they are moving electrons and trapping them. I agree at the moment Flash holds all the aces. As I keep saying the only way now a new NV memory has a chance is to start at relatively small bit density embedded with a processor. It might be possible to fully develop, silicon compatibility etc, and really fast new NV ReRAM/RRAM technolgy memory suitable for cache and end run the high density big stuff. That is what I would try and do now if I had the time and resources. I do not think it would be PCM, once bitten twice shy.
>>With respect to TiO2, I think in any device where you build up a concentration gradient of material that can be moved by electrical means relatively easily is likely to suffer from thermal degradation. I am afraid it's a case of dammed if you do dammed if you don't. If you require a high temperature/high energy to write the memory then that's a problem in many other respects, if you have low energy then diffusion might be the elevated temperature data retention problem.<<
So, how would you describe how Flash gets around this dilema. I'm guessing it has to do with the higher level of control you get from the device being a transistor, but I'm not enough of an engineer to say more or be sure I'm right.
It sure sounds like these guys are in for limited success and skies the limit for 3D Flash.
>>Cost of ReRAM plant at 10-20nm Samsung should know, most of it will be for silicon processing anyway.<<
So that's what Intel's paying for a fab nowadays? I hadn't realized the price went up that much.
Dear Ron - Thank you for your positive reference to CeRAM. Due to some contractual oblications, within 180 days we cannot discuss much about what we are doing. However, since your excellent article on the technology, much has happened. In the integration front, it has been achieved complete ALD deposition. In the device front, we have a third party testing large areas devices with very good results and confirming the key aspect of the technology as being one that has no filaments and has controllable process driven properties to stay as predicted. On the theoretical front, the Mott transition has kept its main ground for description. And, soon, all of this will come out in the literature. Patents have been issued in every major country and broad claims on how to control Mott Transition only switching via establishing a well passivated CO-doped TMO, has been well established. Switching and disproportionationation have been shown without ambiguity in XPS data. That is, in NiO, we have spectra for On state, showing Ni(+2) dominance, and off state, showing (Ni+3 and Ni+1, dominance) with a transition energy between states of about 0.7 eV, comparable to the reset/set voltage window in the electrical measurements. Key to this, is that compared with non-doped spectra, and filament spectra, we have, for non-doped, just the Ni+3/Ni+2 insulator. Then, as we create filaments, we meet the normal data of other people in which the device is Ni(+0) rich, showing the metallic nature of NiO after filament creation. We extended results to many materials including TiO based devices. Sorry to report that without double layer or filaments, HfO or WOx and Ta2O3, are not Mott switches as expected. So, the CeRAM concept requires a fine tunning of the material property not native to these TMOs. We understand why and will publish soon. As NiO is still the winner, we focused more on a three prong approach : 1. LArge area - to confirm the science and process options;2. Ultra nano scale with in-plane electrodes, starting at 130 nm and ending at 2 nm line width, via a batch scaled AFM lythography - including 4 pt probes and top views that mimic cross sections with many area and thickness ratios. A laser triggering system is being set up to measure the ultimate switching speed in 2 nm devices etc. and, 3. A foundry focused, completely commercially oriented test demo to qualify the device in embedded applications. 1 and 2 already ongoing and no show stoppers, and 3 under secrecy such that no disclosures will come for a while. No need to sell hard, no VC acceptance from us - all in a real world classical business model with fantastic strategy to reach real applications. So, I would say, that without theatrics, and following the Symetrix style, we are qualifying the technology for commercial use, and securing the scientific and commercial priority of this breakthrough. At 2 nm, if all goes well, we are in a new territory, beyond Moore and yet, not a ga-ga futuristic cloud. It takes time. Our brand of FeRAM was done the same way, it now surpases about 1 Billion chips and it has a quiet and yet secured and real position under Panasonic - from NFC to other applications. Since the first market for CeRAM is IoT, embedded makes sense, and parallel research in the Correlated Electron field in many other applications is ongoing as described above. The capability to do 4 Pt probe in in-plane devices is great, and devices are being tested as we speak. We will put results on the web site as things develop (www.symetrixcorp.com) and after we clear patent/secrecy windows and journal subscription. Please be patient. It is important to remember that RRAM is generally good. But, an RRAM without filaments and electroforming is a big claim, so that, extraordinary claims, needs extraordinary evidence (Carl Sagan), we do not take it lightly the responsibility of delivering a true scientific and commercial breakthrough. Since we are not yong guys with a biz plan to shop to VCs, and this is our second memory and 5th major device being introduced to the market, our business model and business ethics force us to not sell wine before its time.
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Are the design challenges the same as with embedded systems, but with a little developer- and IT-skills added in? What do engineers need to know? Rick Merritt talks with two experts about the tools and best options for designing IoT devices in 2016. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.