Resistion:-Yes you are right, quantifying the differential drift rates for chalcogenides and as I suggested other materials with temperature and time will be necessary as a first order of business. The differential in drift rates that IBM were reporting for MLC-PCMs appeared to be consistent enough for that application. Before debating possible applications in the area of learning or storage it would be useful to run some Spice-like simulations to see what the minimum resistance level difference between the two hybrid resistors is necessary to allow the device to operate and the power ramp latency. In that respect I think for the IBM LIM a 20% difference in some circuit components was necessary for the memory to operate as both a LIM and SRAM. If there are any student readers or others who would like to volunteer for the single cell simulation task and demonstrate their expertise please step forward.
As we unveil EE Times’ 2015 Silicon 60 list, journalist & Silicon 60 researcher Peter Clarke hosts a conversation on startups in the electronics industry. Panelists Dan Armbrust (investment firm Silicon Catalyst), Andrew Kau (venture capital firm Walden International), and Stan Boland (successful serial entrepreneur, former CEO of Neul, Icera) join in the live debate.