@MButts: "Not much point in showing a bunch of datapaths (in diagrams that render too small to read) without even briefly explaining the round and arrow-shaped elements that run across the top, and how they relate to the micropipeline you introduced before."
The diagrams are just introduced for provding a flashing idea on how the mcropipelined asynchronous logic designs should be implemented from a geometric point of view. For this purpose, this diagrams are just snapshots taken from a complete Xilinx ISE project, where the real logic behind the weird schematic simbols can be studied.
Note that all of them are implemented in schematic mode, as an extra effort to allow visualizing how the signals are really flowng throughout the system.
For a deeper detail of the inner gears under the hood, you should check too the next preprinted paper on Arxiv:
Not much point in showing a bunch of datapaths (in diagrams that render too small to read) without even briefly explaining the round and arrow-shaped elements that run across the top, and how they relate to the micropipeline you introduced before.
I've always been interested in asynchronous logic and once did a few FPGA experiments along these lines, so I'm interested in this work. I just wish there was a little more technique and a fewer examples in your column. Now I'll go take a look at your site. All the best!
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Are the design challenges the same as with embedded systems, but with a little developer- and IT-skills added in? What do engineers need to know? Rick Merritt talks with two experts about the tools and best options for designing IoT devices in 2016. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.