Breaking News
Newest First | Oldest First | Threaded View
User Rank
Re: Keep out zones
Astronut0   3/21/2014 5:15:24 PM
Good catch, chipmonk0.  Thanks!

rick merritt
User Rank
Re: Keep out zones
rick merritt   3/20/2014 7:42:53 PM
@Chipmonk: I'd be happy to get an article on 3-D TSVs from you. Fire at will.

Thanks for noting the problem --NOW FIXED -- in the text re TEZZARON. It was my error in mistaking the company name and mischaracterizing Herb Reiter's comment.

User Rank
Re: Keep out zones
Deepak1982   3/20/2014 12:54:43 PM
TSVs can be used to reduce chip-to-chip wire lengths, or to reduce on-chip global wire lengths. For on-chip global wire length reduction, small TSV area is important due to the high TSV densities. If, instead of 5um TSVs with 7um keep-out zones, you have 5um TSVs with <1um keep-out zone, each TSV moves from taking a ~20um region to taking a ~7um region, which represents a 8-9x area reduction. 

Bottom line: Eliminating the keep-out zone will eventually help TSVs reduce on-chip global wire lengths. 

User Rank
Re: Keep out zones
chipmonk0   3/20/2014 12:30:41 PM
 " Separately, Terrazon has shown a design using tungsten TSVs that have a high CTE and thus can eliminate the keep-out zone, Reiter notes. "

this statement is absolutely WRONG.

Tungsten has been used instead of Copper to fill TSV vias because it has a LOWER CTE than Cu, almost similar to Silicon hence unlike Cu almost no mismatch stresses during temperature cycling or any effect on device performance ( therefore very small KOZs and the freedom to disperse TSVs throughout the chip and not just at a central location ).

The company that uses W to fill vias is not Terrazon but TEZZARON

The stress field around a filled TSV depends on the square of the Via Dia, the thermal mismatch strain and the modulus of the fill material. Hence the effort now at LETI and elsewhere to try smaller dia TSVs and fill them with lower Mod materials.

Tungsten filling of vias were chosen to satisfy theory and are already in production for Memory chips. The limitation of W is that can't be too long, hence Cu filled vias are preferred for TSVs in interposers ( 2.5-d ).

BTW did this IITC paper from GloFo report any reliability test results ( e,g. temp. cycling effects on the compressive layer in the vias and ultimately surrounding transistors ) ?

The offer of writing a comprehensive article on 3-d TSV technology for EE Times still stands.


rick merritt
User Rank
Keep out zones
rick merritt   3/20/2014 9:16:27 AM
How big an issue is this for your design? What tech challenges, if any, are even bigger?

rick merritt
User Rank
rick merritt   3/20/2014 9:15:09 AM
@3-D Guy: Fixed.  Thx.

3D Guy
User Rank
3D Guy   3/20/2014 8:13:37 AM
I think there is a small typo. CEA-LETI has been working on nm scale TSVs. Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)

What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.

Brought to you by:

Most Recent Comments
Like Us on Facebook
Special Video Section
The LTC2380-24 is a versatile 24-bit SAR ADC that combines ...
In this short video we show an LED light demo to ...
Wireless Power enables applications where it is difficult ...
LEDs are being used in current luxury model automotive ...
With design sizes expected to increase by 5X through 2020, ...
Linear Technology’s LT8330 and LT8331, two Low Quiescent ...
The quality and reliability of Mill-Max's two-piece ...
LED lighting is an important feature in today’s and future ...
The LT8602 has two high voltage buck regulators with an ...
Silego Technology’s highly versatile Mixed-signal GreenPAK ...
The quality and reliability of Mill-Max's two-piece ...
Why the multicopter? It has every thing in it. 58 of ...
Security is important in all parts of the IoT chain, ...
Infineon explains their philosophy and why the multicopter ...
The LTC4282 Hot SwapTM controller allows a board to be ...
This video highlights the Zynq® UltraScale+™ MPSoC, and sho...
Homeowners may soon be able to store the energy generated ...
The LTC®6363 is a low power, low noise, fully differential ...
See the Virtex® UltraScale+™ FPGA with 32.75G backplane ...
Vincent Ching, applications engineer at Avago Technologies, ...