Design Con 2015
Breaking News
Comments
Oldest First | Newest First | Threaded View
Page 1 / 5   >   >>
EdwinP0
User Rank
Rookie
40,000 wafers/minute!!!!
EdwinP0   3/27/2014 6:47:54 PM
NO RATINGS
Did you mean 40,000/month?

3D Guy
User Rank
Manager
Intel's cost per transistor different
3D Guy   3/27/2014 6:49:06 PM
Intel's Mark Bohr shows cost per transistor scaling for them upto 10nm. However, fabless vendors like nVidia and Broadcom have been complaining about cost per transistor scaling.

Its commonly known in the industry that TSMC is the only option for 16nm/20nm for most fabless companies (since it has 16nm/20nm yielding and has availability). If TSMC has no competition, it can charge whatever it wants... do you think that is a reason for the disconnect between cost per transistor scaling at TSMC and Intel?

Or do you think the cost difference is cos' of Intel scaling its BEOL between 22nm and 14nm, unlike TSMC?

Or do you think Intel is able to scale better and yield better due to more regular layouts (which use cheaper litho steps)?

From what I'm hearing, the lack of competition for TSMC is a major reason for cost per transistor not scaling for fabless companies. That problem won't be solved with FD-SOI. 

HJ88
User Rank
Freelancer
Re: 40,000 wafers/minute!!!!
HJ88   3/27/2014 7:00:15 PM
NO RATINGS
Yes, 40,000 wafers/month.

rick merritt
User Rank
Author
Re: Intel's cost per transistor different
rick merritt   3/27/2014 7:26:18 PM
NO RATINGS
@3D Guy: Good question.  Handel: I await your answer...

Meanwhile, 3D Guy: Are you saying GloFo/Samsung/IBM and UMC have no foundry 20nm in production?

rick merritt
User Rank
Author
Re: 40,000 wafers/minute!!!!
rick merritt   3/27/2014 7:29:27 PM
NO RATINGS
I fixed the "/month" editing error

Or_Bach
User Rank
Rookie
Re: Intel's cost per transistor different
Or_Bach   3/27/2014 7:57:10 PM
NO RATINGS
Few points to add and response as follow:

A. The best path for the idustry to keep reducing cost from here on is adapt monolithic 3D just as the NV NAND vendors are. A list of the cost benifits associated in monolithic 3D could be found at: <http://www.monolithic3d.com/3d-ic-edge1.html>

B. While the cost per gate do not look good below 28nm it is getting far worst once we account for the embedded SRAM which barly scale, severly impacting the cost of SOC as was detailed in our recent blog: <http://www.eetimes.com/author.asp?section_id=36&doc_id=1321536>

C. Intel was suggested that ultra agressive scaling would provide the solution to the higher wafer costs associated with scaling. It dose not make much sense, and Intel continuing problems with yielding 14nm SOC add doubts.

Unlike foundries there is too much of unknown in respect to Intel to be able to truly response to some of the questions presented by 3D Guy. We did write a detailed blog on this issues:  Intel vs. TSMC: An Update - <http://electroiq.com/blog/2014/01/intel-vs-tsmc-an-update/>

 

alex_m1
User Rank
CEO
Re: Intel's cost per transistor different
alex_m1   3/27/2014 8:15:01 PM
NO RATINGS
Zvi, when looking at the companies you're involed with - easic , zeno semi and 3d monlithic - they seems to complement each other very well to the point that maybe, chips with easic's model becoming similarly prices to cell based asic, while enjoying much reduced design costs.


Do you think it's a possbility?

 

alex_m1
User Rank
CEO
Re: 40,000 wafers/minute!!!!
alex_m1   3/27/2014 8:17:15 PM
NO RATINGS
Rick, Did "The 20nm node faces difficulty achieving low leakage" meant "achieving low cost"?

Or_Bach
User Rank
Rookie
Re: Intel's cost per transistor different
Or_Bach   3/27/2014 8:24:18 PM
NO RATINGS
Hi Alex

Yes, and even more so:

Using monolithic 3D technology would enable a field prgramble fabric with costs comptetive with Standard Cell !!

US Made
User Rank
Rookie
20 is planar
US Made   3/27/2014 9:02:46 PM
NO RATINGS
Why 20 is expensive?. supose to be planar? also remember when the masses are there cost will come down...

Page 1 / 5   >   >>


Most Recent Comments
MeasurementBlues
 
Robert Miller
 
JGrubbs
 
Max The Magnificent
 
mhrackin
 
MeasurementBlues
 
Max The Magnificent
 
Max The Magnificent
 
Bill.Choi
Top Comments of the Week
Flash Poll
Like Us on Facebook

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)
EE Life
Frankenstein's Fix, Teardowns, Sideshows, Design Contests, Reader Content & More
Max Maxfield

Want a Voltera Desktop PCB Printer?
Max Maxfield
4 comments
I just received an email from my chum Javi in Spain. "Have you heard about Voltera (VolteraInc.com)? It's a Canadian company that is going to offer desktop-size PCB printers for fast ...

Martin Rowe

No 2014 Punkin Chunkin, What Will You Do?
Martin Rowe
2 comments
American Thanksgiving is next week, and while some people watch (American) football all day, the real competition on TV has become Punkin Chunkin. But there will be no Punkin Chunkin on TV ...

Rich Quinnell

Making the Grade in Industrial Design
Rich Quinnell
15 comments
As every developer knows, there are the paper specifications for a product design, and then there are the real requirements. The paper specs are dry, bland, and rigidly numeric, making ...

Martin Rowe

Book Review: Controlling Radiated Emissions by Design
Martin Rowe
1 Comment
Controlling Radiated Emissions by Design, Third Edition, by Michel Mardiguian. Contributions by Donald L. Sweeney and Roger Swanberg. List price: $89.99 (e-book), $119 (hardcover).

Special Video Section
The LT8640 is a 42V, 5A synchronous step-down regulator ...
The LTC2000 high-speed DAC has low noise and excellent ...
How do you protect the load and ensure output continues to ...
General-purpose DACs have applications in instrumentation, ...
Linear Technology demonstrates its latest measurement ...
10:29
Demos from Maxim Integrated at Electronica 2014 show ...
Bosch CEO Stefan Finkbeiner shows off latest combo and ...
STMicroelectronics demoed this simple gesture control ...
Keysight shows you what signals lurk in real-time at 510MHz ...
TE Connectivity's clear-plastic, full-size model car shows ...
Why culture makes Linear Tech a winner.
Recently formed Architects of Modern Power consortium ...
Specially modified Corvette C7 Stingray responds to ex Indy ...
Avago’s ACPL-K30T is the first solid-state driver qualified ...
NXP launches its line of multi-gate, multifunction, ...
Doug Bailey, VP of marketing at Power Integrations, gives a ...
See how to ease software bring-up with DesignWare IP ...
DesignWare IP Prototyping Kits enable fast software ...
This video explores the LT3086, a new member of our LDO+ ...
In today’s modern electronic systems, the need for power ...