If we don't get an automatic cost reduction from process scaling I guess we need to create sa new set of skills that allow us to get cost reductions from other areas. Architecture and system design perhaps? Maybe we will also see more tools for helping optimize system architecture for lower cost implementations? Maybe reconfigurable logic will actually let use use a transitior for more than one functions improving cost efficiency?
Anyone have other ideas on where innovation might help us reduce system cost?
In spite of a lot of hoopla, the introduction of 2.5 and 3-d packaging technologies have been slow because of fragmentation among the players. So far large IDMs like Intel with proven track record of developing and putting technologies into place all on their own had not taken much interest in Package level integration ( System in a Package ) because they had Fabs 2 nodes ahead of the best Foundries and could integrate more economically on a single chip. Now that Intel has finally thrown its hat in the ring ( to integrate their Processor for Altera and Memory chips from others at high Bandwidth ), the pace of development and implementation of 2.5 and 3d will get faster.
As we unveil EE Times’ 2015 Silicon 60 list, journalist & Silicon 60 researcher Peter Clarke hosts a conversation on startups in the electronics industry. Panelists Dan Armbrust (investment firm Silicon Catalyst), Andrew Kau (venture capital firm Walden International), and Stan Boland (successful serial entrepreneur, former CEO of Neul, Icera) join in the live debate.