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eetimes_#24
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Rife with errors
eetimes_#24   4/10/2014 2:39:29 AM
I literally lost count of the technical errors in this piece. I suggest readers not rely on it for mission-critical needs.

DougInRB
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Re: Rife with errors
DougInRB   4/10/2014 11:41:45 AM
These aren't even technologies to watch - they are interface solutions to consider.  No, I won't put DDR4 in my smartphone.  No, I won't put embedded DRAM in my server, etc.  Since this article was about 'memory interconnect technologies to watch', why is a serial connected RAM interface like HMC not even mentioned?

 

barunkd
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HMC/ HBM is the technology
barunkd   4/11/2014 4:24:41 AM
3D Memory, with its two flavors HMC and HBM, will become the high speed memory of future. They will replace DDR technolog in server application. Besides providing much higher bandwidth than DDR4 (4x to 6x), HMC makes the job of PCB designer easier becuase it is based of serial interface technology where as DDR4 is based on parallel interface technology. But the question is when. There are two challenges. First one is cost, HMC is at least 3x costlier (if not more) than DDR4. And it is not pin replacable, creating the need of fresh board design. Server has long product lifetime, hence this is a challenge to HMC adoption

Regards,

Barun



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As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.

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