@Max: Thank you for the information! The DSP blocks are not supported on Cyclone V SoCs I suppose? Are these new devices supported on the Quartus II design tool? Does the older versions of the tool support these new SoCs or it would be required to move to a newer version?
2. How much power does one of these consume running 1.5 TFLOPS, including the logic needed to get operands to the FPUs?
Also, I sure hope the developers remember to write their floating-point models using single precision, or they're going to get a nasty surprise when they discover that floating-point numbers are not real numbers.