Breaking News
Comments
Newest First | Oldest First | Threaded View
Page 1 / 2   >   >>
sa_penguin
User Rank
Manager
Re: Two questions
sa_penguin   6/14/2014 11:51:31 PM
NO RATINGS
I'm with you on cost. I keep hoping Xilinx (or Altera) release a low level chip like the Spartan-6, combined with an ARM-M3 or -M4 rather than a Cortex-A. Cheaper chips can be highly profitable when sold in bulk.

betajet
User Rank
CEO
Re: Two questions
betajet   4/23/2014 6:17:29 PM
NO RATINGS
Thank you, Tony.  That's a lot more useful than Michael Parker's answer below.

I think I'll stick with my Xilinx XC3S200A and XC3S250E :-)

 

TonyTib
User Rank
CEO
Re: Two questions
TonyTib   4/23/2014 5:51:19 PM
NO RATINGS
The cheapest Arria 10 available at Digikey or Mouser is the 10AX066H4F34I4SGES; it's a measly $3K; that's a bargain compared to the most expensive one listed, at ~$20K.
 

10AX066H4F34I4SGES



Max The Magnificent
User Rank
Blogger
Re: Floating point FPGA cost and power consumption
Max The Magnificent   4/23/2014 3:20:01 PM
NO RATINGS
@Michael: Altera's Arria10 FPGAs will be priced competitively with other mid-range FPGAs which do not offer this the high performance floating point capabilities of Arria 10.

Great -- thanks for the feedback Michael

Michael Parker
User Rank
Rookie
Floating point FPGA cost and power consumption
Michael Parker   4/23/2014 3:16:12 PM
NO RATINGS
The new floating point capabilities are available across the entire Arria 10 family, with density from 160 kLEs to over 1 MLEs. Pricing varies by device density, speed grade, and package. However Altera's Arria10 FPGAs will be priced competitively with other mid-range FPGAs which do not offer this the high performance floating point capabilities of Arria 10.

Power consumption will depend upon the algorithm, the amount and type of I/O needed, amount of on-chip memory and logic used as well as actual GFLOPs. Normally, FPGA designers use the vendor supplied EPE (early power estimator) to estimate their power, using their own design requirements. However, in order to help designers better assess the power used with this new feature, Altera will be providing a number of floating point benchmark designs on Arria 10 development boards in 2H 2014, which will include both GFLOPs and GFLOPs per Watt figures.

True 32 bit single precision floating point numerical representation is supported in the Arria 10 FPGAs. If by "real" numbers, this means double precision floating point (64 bit representation), this can still be implemented in the FPGA. However, since support for double precision is not available in hardened circuitry, it will be implemented in programmable logic and leverage fixed point multipliers. This will result in a substantial increase in logic usage and reduction in performance.

 

Max The Magnificent
User Rank
Blogger
Re: Compatibility to the older development tool
Max The Magnificent   4/23/2014 9:46:41 AM
NO RATINGS
@Sanjib: Are these new devices supported on the Quartus II design tool? Does the older versions of the tool support these new SoCs or it would be required to move to a newer version?


My understanding is that we have to wait for the next release (I think that will be 14.1) -- not sure when it will be out.

Max The Magnificent
User Rank
Blogger
Re: Compatibility to the older development tool
Max The Magnificent   4/23/2014 9:44:12 AM
NO RATINGS
@Sanjib: Thank you for the information! The DSP blocks are not supported on Cyclone V SoCs I suppose?

I'm afraid not -- these hardened floating-point capable DSP blocks are only available in 20nm Arria 10 FPGAs & SoCs today, with 14nm Stratix 10 FPGAs & SoCs coming online next year (2015)

Max The Magnificent
User Rank
Blogger
Re: Two questions
Max The Magnificent   4/23/2014 9:41:56 AM
@Betajet: Also, I sure hope the developers remember to write their floating-point models using single precision, or they're going to get a nasty surprise when they discover that floating-point numbers are not real numbers.

If they don;t think of this, then they are silly-billy's of no account. Aslo, if they need double precision for any part of the data path, they can always use the "soft" floating-point approach.

Max The Magnificent
User Rank
Blogger
Re: Two questions
Max The Magnificent   4/23/2014 9:40:29 AM
NO RATINGS
@betajet: How much power does one of these consume running 1.5 TFLOPS, including the logic needed to get operands to the FPUs?

Again -- I don't know, but I'll ask

Max The Magnificent
User Rank
Blogger
Re: Two questions
Max The Magnificent   4/23/2014 9:39:42 AM
NO RATINGS
@betajet: How much do these puppies cost?

If you have to ask, you can't afford them LOL

I don't know, but I'll ask

Page 1 / 2   >   >>


EE Life
Frankenstein's Fix, Teardowns, Sideshows, Design Contests, Reader Content & More
Max Maxfield

Steve Wozniak Reacts to Latest iPhone
Max Maxfield
Post a comment
Funnily enough, just a few days ago as I pen these words, I was chatting with my wife (Gina the Gorgeous) when she informed me that -- as a kid -- she had never played at making a ...

EDN Staff

11 Summer Vacation Spots for Engineers
EDN Staff
20 comments
This collection of places from technology history, museums, and modern marvels is a roadmap for an engineering adventure that will take you around the world. Here are just a few spots ...

Glen Chenier

Engineers Solve Analog/Digital Problem, Invent Creative Expletives
Glen Chenier
15 comments
- An analog engineer and a digital engineer join forces, use their respective skills, and pull a few bunnies out of a hat to troubleshoot a system with which they are completely ...

Larry Desjardin

Engineers Should Study Finance: 5 Reasons Why
Larry Desjardin
46 comments
I'm a big proponent of engineers learning financial basics. Why? Because engineers are making decisions all the time, in multiple ways. Having a good financial understanding guides these ...

Flash Poll
Top Comments of the Week
Like Us on Facebook
EE Times on Twitter
EE Times Twitter Feed

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)