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betajet
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Two questions
betajet   4/22/2014 10:00:11 PM
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Two questions:

1.  How much do these puppies cost?

2.  How much power does one of these consume running 1.5 TFLOPS, including the logic needed to get operands to the FPUs?

Also, I sure hope the developers remember to write their floating-point models using single precision, or they're going to get a nasty surprise when they discover that floating-point numbers are not real numbers.

Max The Magnificent
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Re: Two questions
Max The Magnificent   4/23/2014 9:39:42 AM
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@betajet: How much do these puppies cost?

If you have to ask, you can't afford them LOL

I don't know, but I'll ask

Max The Magnificent
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Re: Two questions
Max The Magnificent   4/23/2014 9:40:29 AM
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@betajet: How much power does one of these consume running 1.5 TFLOPS, including the logic needed to get operands to the FPUs?

Again -- I don't know, but I'll ask

Max The Magnificent
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Re: Two questions
Max The Magnificent   4/23/2014 9:41:56 AM
@Betajet: Also, I sure hope the developers remember to write their floating-point models using single precision, or they're going to get a nasty surprise when they discover that floating-point numbers are not real numbers.

If they don;t think of this, then they are silly-billy's of no account. Aslo, if they need double precision for any part of the data path, they can always use the "soft" floating-point approach.

TonyTib
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Re: Two questions
TonyTib   4/23/2014 5:51:19 PM
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The cheapest Arria 10 available at Digikey or Mouser is the 10AX066H4F34I4SGES; it's a measly $3K; that's a bargain compared to the most expensive one listed, at ~$20K.
 

10AX066H4F34I4SGES



betajet
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Re: Two questions
betajet   4/23/2014 6:17:29 PM
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Thank you, Tony.  That's a lot more useful than Michael Parker's answer below.

I think I'll stick with my Xilinx XC3S200A and XC3S250E :-)

 

sa_penguin
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Re: Two questions
sa_penguin   6/14/2014 11:51:31 PM
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I'm with you on cost. I keep hoping Xilinx (or Altera) release a low level chip like the Spartan-6, combined with an ARM-M3 or -M4 rather than a Cortex-A. Cheaper chips can be highly profitable when sold in bulk.

Sanjib.A
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Compatibility to the older development tool
Sanjib.A   4/22/2014 11:38:18 PM
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@Max: Thank you for the information! The DSP blocks are not supported on Cyclone V SoCs I suppose? Are these new devices supported on the Quartus II design tool? Does the older versions of the tool support these new SoCs or it would be required to move to a newer version?

Max The Magnificent
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Re: Compatibility to the older development tool
Max The Magnificent   4/23/2014 9:44:12 AM
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@Sanjib: Thank you for the information! The DSP blocks are not supported on Cyclone V SoCs I suppose?

I'm afraid not -- these hardened floating-point capable DSP blocks are only available in 20nm Arria 10 FPGAs & SoCs today, with 14nm Stratix 10 FPGAs & SoCs coming online next year (2015)

Max The Magnificent
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Re: Compatibility to the older development tool
Max The Magnificent   4/23/2014 9:46:41 AM
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@Sanjib: Are these new devices supported on the Quartus II design tool? Does the older versions of the tool support these new SoCs or it would be required to move to a newer version?


My understanding is that we have to wait for the next release (I think that will be 14.1) -- not sure when it will be out.

Michael Parker
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Floating point FPGA cost and power consumption
Michael Parker   4/23/2014 3:16:12 PM
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The new floating point capabilities are available across the entire Arria 10 family, with density from 160 kLEs to over 1 MLEs. Pricing varies by device density, speed grade, and package. However Altera's Arria10 FPGAs will be priced competitively with other mid-range FPGAs which do not offer this the high performance floating point capabilities of Arria 10.

Power consumption will depend upon the algorithm, the amount and type of I/O needed, amount of on-chip memory and logic used as well as actual GFLOPs. Normally, FPGA designers use the vendor supplied EPE (early power estimator) to estimate their power, using their own design requirements. However, in order to help designers better assess the power used with this new feature, Altera will be providing a number of floating point benchmark designs on Arria 10 development boards in 2H 2014, which will include both GFLOPs and GFLOPs per Watt figures.

True 32 bit single precision floating point numerical representation is supported in the Arria 10 FPGAs. If by "real" numbers, this means double precision floating point (64 bit representation), this can still be implemented in the FPGA. However, since support for double precision is not available in hardened circuitry, it will be implemented in programmable logic and leverage fixed point multipliers. This will result in a substantial increase in logic usage and reduction in performance.

 

Max The Magnificent
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Re: Floating point FPGA cost and power consumption
Max The Magnificent   4/23/2014 3:20:01 PM
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@Michael: Altera's Arria10 FPGAs will be priced competitively with other mid-range FPGAs which do not offer this the high performance floating point capabilities of Arria 10.

Great -- thanks for the feedback Michael



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