Of course, stacking memory is the most obvious application, but I'm sure that when designers put on their thinking cap they'll find many more useful applications of having active devices within the metalization layers--just like you did.
Assuming idrive is good, leakage is comparable or better, and low source/drain resistance we could have these power gating (e.g., header switches) up near the top of the BEOL. Rather then now, where we have to go all the way down to FEOL then post switch route back up to upper layers just to distribute current back down to functional devices.
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