Of course, stacking memory is the most obvious application, but I'm sure that when designers put on their thinking cap they'll find many more useful applications of having active devices within the metalization layers--just like you did.
Assuming idrive is good, leakage is comparable or better, and low source/drain resistance we could have these power gating (e.g., header switches) up near the top of the BEOL. Rather then now, where we have to go all the way down to FEOL then post switch route back up to upper layers just to distribute current back down to functional devices.
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Are the design challenges the same as with embedded systems, but with a little developer- and IT-skills added in? What do engineers need to know? Rick Merritt talks with two experts about the tools and best options for designing IoT devices in 2016. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.