Design Con 2015
Breaking News
Comments
Newest First | Oldest First | Threaded View
Page 1 / 2   >   >>
R_Colin_Johnson
User Rank
Blogger
Re: That's a big transistor...
R_Colin_Johnson   5/13/2014 1:21:24 PM
NO RATINGS
So a 1mm square that requires high voltages and has low mobilities. Sounds like the application space is fairly specific.... "good enough for sensors" was mentioned. With so many sensors, that doesn't help. Do you have alink pointing to more device details?

Authors say the most likely sensors -- chem sensors, proximity sensors, various physical sensors such as pressure sensors just hapend to run low.  Additionally, some sensors for examle many chem sensors) actually use compatible materials that can be potentially printed in the same manner.


In other projects at UC Berkeley the group been doing a lot of work on internet-of-things type sensing applications, and the transistors herein are more than adequate.                                                                                                                                                                                                                                                                                                                                                                           

selinz
User Rank
CEO
Re: That's a big transistor...
selinz   5/11/2014 11:39:05 AM
NO RATINGS
So a 1mm square that requires high voltages and has low mobilities. Sounds like the application space is fairly specific.... "good enough for sensors" was mentioned. With so many sensors, that doesn't help. Do you have alink pointing to more device details?

R_Colin_Johnson
User Rank
Blogger
Re: That's a big transistor...
R_Colin_Johnson   5/8/2014 7:22:10 PM
NO RATINGS
Astronut0 said: Nice proof of concept, but that's one BIG, SLOW transistor! It will be interesting to see whether smaller, faster transistors can be built by the same method. Question: if they're built in layers, won't planarity become an issue? -- I didn't know the answers so I asked the authors. Here's what they said: RE: smaller transistors: Yes, smaller transistors can be made. Bandgap is large, so that helps with leakage, but @ high fields there is enhanced leakage through grain boundary generation. Mobility is what it is, however, without associated improvements in material. Mobility will still be lower than Si... the best mobility numbers reports for these materials are <100cm2/V-s, but, on the other hand, achievable carrier concentrations can be higher due to available states. RE: planarity: Planarization would be CMP if integrated within the other metal levels, or possibly SOG if integrated on top of the BEOL metallization.

Astronut0
User Rank
Rookie
That's a big transistor...
Astronut0   5/8/2014 4:55:55 PM
NO RATINGS
Nice proof of concept, but that's one BIG, SLOW transistor!  It will be interesting to see whether smaller, faster transistors can be built by the same method.
Question: if they're built in layers, won't planarity become an issue?

GMF
User Rank
Apprentice
Re: That would be ideal for power gating switches...
GMF   5/7/2014 5:50:00 PM
NO RATINGS
MAybe more cost atractive by depositing these materials through standard CMOS process. At least the transister size could be much smaller.

R_Colin_Johnson
User Rank
Blogger
Rights and Permissions
R_Colin_Johnson   5/7/2014 4:00:29 PM
NO RATINGS
SRC members will receive access to these research results via a non-exclusive royalty free license as part of their SRC membership, but others interested in using it can go through the university. (I know this is a dupe of what I appended to "Re: That would be ideal for power gating switches...", but thought it should be said separately too.)

R_Colin_Johnson
User Rank
Blogger
Re: That would be ideal for power gating switches...
R_Colin_Johnson   5/7/2014 3:57:59 PM
NO RATINGS
Another great application, and I'm sure there are many more. Of course, SRC members will receive access to these research results via a non-exclusive royalty free license as part of their SRC membership, but others interested in using it can go through the university.

R_Colin_Johnson
User Rank
Blogger
Re: FPGA Configuration
R_Colin_Johnson   5/7/2014 2:08:21 PM
NO RATINGS
This was just an early test, but they have plans to get down intro the sub-micron range using nanoimprint technology.

jeremybirch
User Rank
CEO
Re: FPGA Configuration
jeremybirch   5/7/2014 12:42:21 PM
NO RATINGS
The picture has a scale on it - the transistor is best part of a millimetre across with a gatelength of perhaps 50-100um - that is not going to be particularly fast.


What are the possibilities for scaling to somewhere nearer the underlying CMOS sizes?

DrFPGA
User Rank
Blogger
FPGA Configuration
DrFPGA   5/7/2014 11:41:01 AM
NO RATINGS
The devices used to configure FPGAs can be slow- they just need to be on or off. Perhaps switches for signal routing right at the wire intersection would be a nice application for this technique...

Page 1 / 2   >   >>


Most Recent Comments
SpaceBug
 
_hm
 
_hm
 
David Ashton
 
R_Colin_Johnson
 
rick merritt
 
pguptaca
 
MeasurementBlues
 
MeasurementBlues
Most Recent Messages
11/26/2014
7:38:46 PM
Flash Poll
Top Comments of the Week
Like Us on Facebook
EE Times on Twitter
EE Times Twitter Feed

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)
EE Life
Frankenstein's Fix, Teardowns, Sideshows, Design Contests, Reader Content & More
Max Maxfield

Book Review: Deadly Odds by Allen Wyler
Max Maxfield
8 comments
Generally speaking, when it comes to settling down with a good book, I tend to gravitate towards science fiction and science fantasy. Having said this, I do spend a lot of time reading ...

Martin Rowe

No 2014 Punkin Chunkin, What Will You Do?
Martin Rowe
Post a comment
American Thanksgiving is next week, and while some people watch (American) football all day, the real competition on TV has become Punkin Chunkin. But there will be no Punkin Chunkin on TV ...

Rich Quinnell

Making the Grade in Industrial Design
Rich Quinnell
13 comments
As every developer knows, there are the paper specifications for a product design, and then there are the real requirements. The paper specs are dry, bland, and rigidly numeric, making ...

Martin Rowe

Book Review: Controlling Radiated Emissions by Design
Martin Rowe
1 Comment
Controlling Radiated Emissions by Design, Third Edition, by Michel Mardiguian. Contributions by Donald L. Sweeney and Roger Swanberg. List price: $89.99 (e-book), $119 (hardcover).