@krisi As referenced in the article, one of the alignment challenges is the tolerance stackup for microbumps and TSV's. I have seen IMEC's roadmap where the microbumps are less than 30um in dia and the TSV's are heading lower than 5um. Without the submicron alignment accuracy needed, wafer to wafer bonding will not be realized!
As we unveil EE Times’ 2015 Silicon 60 list, journalist & Silicon 60 researcher Peter Clarke hosts a conversation on startups in the electronics industry. Panelists Dan Armbrust (investment firm Silicon Catalyst), Andrew Kau (venture capital firm Walden International), and Stan Boland (successful serial entrepreneur, former CEO of Neul, Icera) join in the live debate.