Note in the 3rd picture, the 20nm process node that uses double patterning, is still on the cost trend. This differs from other sources that continue to claim 28nm is the lowest cost node. So the final cost ended up being lower then expected. Perhaps 16/14nm will still follow the cost trend?
I don't agreed with you about IDM, in a far more comfortable situation versus fabless. All fabless contenders are at least one year late on 20nm (pretty inferior to the 2.5 years old Intel 22nm, from the point of view of performance and power consumption)
Still...yes Qualcomm/Apple are rich enough to have a fab(s) but this means more costs, more staff, more risks, less net profit. The last part of my post is to say that times of "easy huge profits" are ending and fabless manufactures need to change their businsess model. It's too easy to blame TSMC or GloFo for low yields......come on! put the money on the table to develop the right process to do better SOCs and modems!!!!!. Nvidia and Amd too are laughable with their lamentations about the new TSMC planar process; they want to make the designs without spending nothing for the process development. This is the end of an era IMO.
Yes, "Qualcomm has got the problem" and so is any semiconductor, fabless or IDM, that is selling to price sensative market and far more so if part of its sells comprise upgrades that might not happend if the price is not attractive.
Qualcomm is large enough and with its $16B on its balance it could afford to buy a fab or a partnership into a fab if that was the problem. Samsung would not have bothered in going back to develop FD SOI on 28 nm if they were not being concern with the same issues Qualcomm is.
Being fabless Qualcomm knows that its main problem, in the near future, will be the interconnection and the adjustment of a given process to a specific design (or otherwise). Unfortunately this company can not dictate the best solution but it must wait instead the choices of foundries. In spite of the very recent fortune of the fabless + foundry model, paradoxically the IDM model will be the must in the next years as the new nodes will become a real challenge. I think that there will be a profound change in the semiconductor industry in upcoming years.
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Are the design challenges the same as with embedded systems, but with a little developer- and IT-skills added in? What do engineers need to know? Rick Merritt talks with two experts about the tools and best options for designing IoT devices in 2016. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.