@George Janac: The capitalization of FP and ASSP reflects the dominant partition in the device.
This is very interesting -- something to think about -- the capitalization of FP and ASSP remonds me of the a/D (little 'a' big 'D'), A/D, and A/d (big 'a' little 'D') to talk about mixed-signal chips and indicate the relative amount of the analog and digital functionality.
We at ChipPath have been working on mapping Zynq-7000, SmartFusion-2, SoC FPGA for over two years and the term we use is FPASSP. Field/Factory programmable ASSP. These devices have a fixed functional parts in the CPU subsystems like ASSP and programmable parts in FPGA or Metal programmable blocks. Three are two partitions hence the combined acronym.
2) ST Spear - Metal programmable fabric blocks plus Cortex-A9 or A15. (FPASSP)
3) Future: ASSP like OMAP or NXP with FPGA blocks on board (fpASSP)
The capitalization of FP and ASSP reflects the dominant partition in the device. In Zynq the CPU partition is less than 22% of the overall die, FPassp. In 3) we will see less that 20% dedicated to FPGA programability, fpASSP. Metal programmable fabrics tend to be more even.
Reason other acronyms don't work as well is SoC implies a full mask set. This is clearly not the case since the NRE is low to zero. Second is the functions are fixed hence go along with ASSP. Mapping architecture these new devices requires complex functional mapping as well as traditional FPGA resource mapping. This all will lead to a new category of EDA tools and IP.
The proper answer of course is C: none of the above or maybe it's D: all of the above.
While it's true that most SoCs are ASICs and vice versa, it's possible to have an ASIC without a processor although these days it would be almost un-heard of. On the other hand, I would guess that most ASSPs these days are SoC and I suppose that some FPGAs could be considere SoC although I'd prefer that my SoC have some analog I/O. And then there's the Cypress PSoC devices which definately qualify as SoC but could they also be considered ASSP?
I've always viewed the differences between an ASIC, ASSP & standard product like this: an ASIC is designed for one customer and often includes some of that customer's IP. An ASSP is an ASIC that gets sold to several customers, competing in the same application space. It typically does not include IP from a specific customer, or if it does, that customer gets a specific time period of exclusivity. A standard product is designed to serve many customers in many different applications. You can buy standard products from distributors.
FPGA simply describes a type of implementation -- programmable, rather than hard wired in silicon. Some FPGAs are SoCs, others are not.
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Are the design challenges the same as with embedded systems, but with a little developer- and IT-skills added in? What do engineers need to know? Rick Merritt talks with two experts about the tools and best options for designing IoT devices in 2016. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.