While the pull-up transistor in the TTL totem-pole output stage is stronger than RTL's resistive pull-up, the pull-down transistor is typically 40 times stronger that the pull-up. IIRC, a standard TTL output can sink 16 mA but source only 0.4 mA. That's OK if you're driving other TTL gates, since TTL inputs have the same 40:1 asymmetry.
The asymmetry meant that TTL-based designs almost always used active-low drive for LEDs and active-low push-buttons. Nowadays CMOS outputs are generally symmetric, but old-timers like me still prefer active-low if an output needs a lot of current.
Developments never make fundamentals old, these things are still being taught the way they are in the curriculum in many countries. And it really helps to explain and test the small circuits, as a stepping measure to bring the students at the current technology usages.
I believe the origin of the asymmetry traces back to relay logic. Relays were either on or off (subtly different from high or low) and that conditioned the way of thinking about logic. It suited bipolar transistors very well, especially since they could only make NPN on the chip in the early days (to do both would add process steps). Well, they could have made a chip with all PNP but that performed worse then as they still do today, so TTL was all NPN and engineers could happily continue in the mindset of a "1" being switch on, pull down. There was not much concern about capacitance so pull-up current could be low. External wires themselves became extra logic (a bus line served as a "wired NAND" when it had a pull-up resistor).
CMOS was exotic technology requiring the chip to go through extra process steps. The first forms which came out in the early 70s were aimed at low power and almost seemed like magic (they ran on less than a micro-amp!). But even these, initially, had the same asymmetric ability to sink 20mA (a standard which went back to teletypes and relays) with very little pull-up (which was fortunate since the PMOS transistors, like PNP, were lower performance than NMOS). It was not until the late 80s when CMOS was pervasive and wired-NAND style busses finally died in pursuit of higher frequency / lower power operation that CMOS outputs became routinely symmetric and the idea of pull down faded entirely.
I'm pretty sure that version with zener diodes must have been a very late iteration of TTL. I recall zeners being a novelty in the early 70s as discretes, and it probably added complexity for them to learn to make them on the same chip as the transistors.
Ahhh the memories.... That was required reading in one of my EE classes at Cal Poly (mid '80s) I had never dreamed there would be so much intrigue and espionage in the design of a computer. I recall that GI was one of the first to utilize PALs.
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