My friend Zvi Or-Bach makes persistent comments about cost no longer declining in advanced nodes. This may or may not be correct, however. Many experts disagree and consider it a "mythology" based on a long discredited graph that is reproduced over and over.
More importantly, the argument may be irrelevant. It is indeed correct that gate density remains same in 20nm planar and 14/16nm FinFET nodal processes. However, power and leakage will profoundly decrease in FinFET process. And power and leakage reduction may be far more imortant than density increase -- for both smartphones and mega data centers.
3D ICs are certainly intriguing and are clearly approaching in few years in memories (HMC, etc.). In mobile processors bandwidth requirements are certainly increasing and drive new type of packaging solutions. Still - even here there are alternative approaches. Leading smartphone OEMs use non-standard memories with ball pitch with 0.4mm and even 0.35 mm pitch. This allows use of traditional package-on-package approaches.
I would say Monolithic 3D will indeed become pivotal - for Global Foundries. They've got specialists from CEA-LETI over in the Albany area. Qualcomm already expressed their interest in this development and also joined the LETI M3D R&D program. I'm sure SMIC will catch up eventually, but they still have a long march to go.
Really great point you make here, @Or_Bach. Thank you. Yes, I did notice in the release, SMIC is talking about 3D IC, which I found interesting. But now that you add more context to it, yes, this could be interpreted as the beginning a big change for the semiconductor industry. Makes sense!
The following comment is speculative and (hopefully?) provocative.
This SMIC -Qualcomm announcement could be the beginning of pivotal change for the semiconductor industry. In my recent article, "28nm – The Last Node of Moore's Law" we have pointed out that dimensional scaling beyond 28nm would not provide reduction of SoC cost and, accordingly, 28 nm could the preferred node for many years. And recently we reported that the industry logic-SOC leader -- Qualcomm "Calls for Monolithic 3D IC ... to make up for the loss of traditional 2D process scaling as wafer costs for advanced nodes continue to increase". Now we have SMIC announcing that it will bring to the market a monolithic 3D for Qualcomm ("Going forward, SMIC will also extend its technology offerings on 3DIC and RF front-end wafer manufacturing in support of Qualcomm Technologies.") So yes, at this time "only a small portion of semiconductors consumed in China are actually produced in China" and yes, "SMIC isn't exactly known for cutting-edge process technologies, compared to other foundry giants." But as the value of the more advanced nodes is diminishing, this announcement suggest that SMIC is positioning itself to lead in the next generation technology driver - monolithic 3D, using the most effective node for years to come. If the rest of the foundries will ignore it, they may find themselves trailing behind SMIC in few years, in what by then could become THE technology driver.
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Are the design challenges the same as with embedded systems, but with a little developer- and IT-skills added in? What do engineers need to know? Rick Merritt talks with two experts about the tools and best options for designing IoT devices in 2016. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.