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alex_m1
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Re: what are their advantages here?
alex_m1   7/23/2014 12:08:58 PM
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@Nick - do you know how can it support flash whioperating at those speeds?

nickflaherty
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Re: what are their advantages here?
nickflaherty   7/22/2014 4:40:51 PM
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It's logically multicore with a time sliced architecture that let's each slice handle an operation or set of operations in a defined time window. This deterministic latency lends itself very well to software programable I/O operations and real time applications such as control and robotics, rather than GPU. It also allows the chip to scale with multiple processor cores each handling multiple slices, all allocated by the compiler. It's done well with the real time Ethernet AVB protocol that is gathering traction in automotive with the determinism, and they have combined their xCore with the Silicon Labs ARM-based controller but this deal is about the definition and implementation of the next generation devices.

elctrnx_lyf
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Re: what are their advantages here?
elctrnx_lyf   7/22/2014 2:11:25 AM
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It is great that some companies in technology are still able to attract the investment from leading technolgy companies. No wonder there is still a lot to come in future.

liletian
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what are their advantages here?
liletian   7/21/2014 9:06:24 PM
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It looks to me that it is more like a GPU (multi-core) based design. What are their key advantages here?

anyone?



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As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.

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