At 10 nm EUV doesn't have as easy opportunity as at 100 nm. The required upgrades (new mask, pellicle, high NA, resist) are weighed against multiple immersion exposures. So far not too many required overall. Beyond 10 nm has other uncertainties as well, including multiple EUV exposures.
This will for sure put some cheers on the face of semiconductor manufacturing industry as this will ultimately result in lower cost and complexicity. However, ASML has to go a long way to give more than 100wph that will make EUV truely production ready.
@resistion: The EUV photon energy is around 92eV or 15 attoJ. This implies about 5,000 photons to provide the 80 pJ necessary to expose a 20nm square. That should not have a shot noise problem. 8 sigma would be +-12%.
Perhaps you are thinking of e-beam, where the beams are typically > 5kV so the number of electrons is a real problem for shot noise?
@krisi: 5,000 photons is quite a good enough number for statistical process control. When it gets down to 500 or less things become really tricky for high reliability over huge numbers of elements which must be exposed. This is because the delivery is a stochastic process, there is no possible feedback loop to correct it.
It is the same reason why your digicam shows noise in low light, when it may be depending on less than 100 photons per pixel.
@resistion: I cited 8 sigma, not 6, since that is the level of reliability needed to make chips with a billion elements. So long as 88% of 5,000 is enough energy delivered to develop the resist, that is good. Of course there is also statistical variation in the resist chemistry, and some variation in the illumination. When a 20mJ/cm2 value is quoted that will normally allow for some variation in characterizing the resist. If not, then add 10% to the input power to be sure to meet the threshold.
Imagine that a few years ago HP announced it was developing a new ultra high resolution printer capable of printing 1500 pages an hour with resolution of 10K dots per inch resolution.
Imagine that the printer has been delayed and plagued by technology development issues, with slow progress being made to the point where customers wonder if it will ever work.
Then one day HP and a major customer announce that they successfully ran 637 sheets of paper through the printer in an hour as proof that it was well on its way to being a working printer.
However HP and the customer conveniently leave out the fact in their announcement that the the paper went through the new printer without anything ever being printed on the paper and the paper came out as blank as it went in. In fact some of the blank paper in the output tray was recycled back to the input tray to be run through the printer again coming out blank again.
No toner was used and nothing showed up on the paper yet HP claimed that the new printer achieved a new "milestone", "watershed" break through rate of 637 pages an hour.
Would you as an investor or analyst view this as an honest and fair representation of progress on the part of HP and its customer or would you find this misleading ?
Well, that is what happened with IBM and ASML.....
To help folks who do not understand the value of the results identified in Rick's EETimes article, I submit the following:
One of the primary challenges holding back the insertion of EUV is the source's power and reliability. Imaging performance is not a primary concern as it is well characterized, robust and operational on IBM's NXE3300. The upgrade to our EUV source was intended to improve its power level and reliability. The 24 hour performance test was intended to stress those two parameters. It was never the intent of the test to generate 637 wafer exposures. That result was a by-product of the source operating correctly, at the increased power and reliably during the test period. Putting resist on the wafers would have had no value whatsoever, other than to test how well our rework process was working. At the EUV Center of Excellence in Albany, we are focused on understanding the "fundamentals of why", so that robust solutions can be developed for high volume manufacturing. The endurance test that we performed was expected to generate a number of performance anomalies. The anomalies would have provided us with learning opportunities to identify root causes and develop subsequent improvements to the technology. It was an unintended output that our source performed so well. However, the result did provide the first data point in the industry, that demonstrates that the current source technology does have the capability to achieve near term performance goals (wafer exposures per day). Since this result was significantly better than previously reported performance, IBM decided to share this with the semiconductor industry so that all could understand the significance and adjust their EUV activities accordingly. For IBM and our Alliance partners, this secured the EUV capability to support our 7nm technology node development.
This is my last response on this topic. It is time for us to get back to work on the maturing of EUV technology.
thank you Dan for the elaborate explanation...would you be interested in presenting this technology at the emergin technologies symposium in Vancouver in 2015? preliminary program at www.cmosetr.com, email@example.com