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krste
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Re: Comments from the OpenRISC project
krste   8/12/2014 2:54:15 AM
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Paul, I understand your frustration, but your understanding of motives and actions in academia is way off. The last thing on our minds was to keep it behind closed doors. Few academic architecture patents are worth anything (though a tiny number do hit the jackpot), and most schools refuse to patent anything, unless there's a licensee already lined up, because historically the patenting costs far outweigh the licensing returns. We joke about architecture academics fighting tooth and nail to have their ideas stolen so they will actually get used. We have shared RISC-V lecture slides and labs with a few other schools who asked to use the material.

When sending out some of the original RISC-V drafts to leading architects in both academia and industry, I worried about spamming busy important people with email about our pet project, so only sent to those I knew reasonably well or had chatted to about the project before. Most didn't reply, but we did get invaluable feedback from those who did.   In addition, our ideas were regularly exposed to a large cross section of leading companies through our lab retreats.

We would have been accused of excessive hubris if we'd tried to make a big splash 2-3 years ago and called on the whole community to contribute with the state of everything back then (and I'm sure we'll be accused by some of hubris now). We only pushed things out now because we think we have enough of the important pieces in place, and have also developed the arguments of why a free ISA makes sense.

I agree hobbyists will be an important force in RISC-V development, but you have to understand the realities of our limited time. I used to read and contribute to comp.arch (and comp.sys.super etc.) regularly about twenty years ago, but once I got a real job, I stopped having time. I thought about posting something about RISC-V to comp.arch, but didn't think it right to post there if I couldn't make a commitment to monitor and followup on the same forum. I do occasionally peek in there to see what's going on, but the signal-to-noise ratio is much lower than the "good old days" and there only seems to be about a dozen total participants, so I simply can't justify spending the time to engage there. We have created email lists on riscv.org and those will be a more appropriate place for RISC-V development discussions.

Paul A. Clayton
User Rank
CEO
Re: Comments from the OpenRISC project
Paul A. Clayton   8/11/2014 10:30:38 PM
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"Krste created an email list based of interested parties based on people who sent him email, which allowed people outside Berkeley to comment on the drafts, and many people did."

That explains the history.

"Note that our original goal was to make something for us to use, not for the world to use.It's only in the last 6-12 months or so that we realized that there was external demand for use of RISC-V; people were using it based on material in from the websites of our classes, even through we hadn't released it yet!"

That shows a surprising lack of foresight. Even as a teaching tool, it should have been obvious that collaboration among universities would be desired. (While DLX had the advantage of being introduced/used in a certain popular textbook ☺, it seemed to have significant attention given to it even though it was not that different from and was later replaced by MIPS.) The network effects for any kind of intellectual content are significant, so it should have been obvious that collaboration and more widespread use would provide significant benefits.

This also seems to show a lack of awareness of the existence of computer architecture hobbyists. There are non-professionals who create ISAs and develop higher-level microarchitectural concepts for fun! While this resource might not be easy to utilize (as areas and degrees of skill vary greatly), ignorance of its presence or dismissing its potential seems wrong. Even people who ask "stupid questions" can be useful for developing clear and extensive documentation.

Academia should be the place where collaboration among organizations is the default mode of operation. (I realize there are first-to-publish pressures for researchers and some universities are getting heavily involved in acquiring patents—monopolies on ideas—, but a project like RISC-V is less subject to such concerns.) If one university sees development of a teaching/research ISA as worth the effort, would it not be obvious that at least a few other universities would want to avoid redundant effort and benefit from network effects?

The commercial potential would be less obvious (though China's work on MIPS-based designs seems to foreshadow India's interest in RISC-V and OpenRISC has had some commercial use). However, if good designs were produced as a side effect of research effort and were made open source, it should be obvious that at least a few hardware developers would be interested.

Again, I do not mean to rant (and as a complete outsider I do not understand the tradeoffs in academic collaboration much less extending that collaboration more broadly), but the lack of effort to draw in people seems both surprising and disappointing.

pattrsn
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Rookie
Re: Comments from the OpenRISC project
pattrsn   8/11/2014 6:58:43 PM
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Krste created an email list based of interested parties based on people who sent him email, which allowed people outside Berkeley to comment on the drafts, and many people did.

Note that our original goal was to make something for us to use, not for the world to use.It was only 6 months or so that we realized that there was external demand for use of RISC-V; people were using it based on material in from the websites of our classes, even through we hadn't released it yet!

Once we realized why people were trying to use RISC-V on their own, we decided to try to go to push it as a free, open standard, hence this blog and techncial reports.

There are still parts of user ISA that will be standard extensions of RISC-V that have not been completed, and we still haven't released the system specification. 

If you might be interested in participating in the RISC-V community, please attend the first RISC-V workshop and boot camp. It's open to everyone, and will be held January 14-15, 2015 in Monterey, CA.

You can even sign up now if you like:

https://www.regonline.com/riscvworkshop.

Matthieu Wipliez
User Rank
Manager
Re: Comments from the OpenRISC project
Matthieu Wipliez   8/11/2014 10:13:07 AM
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Regarding Chisel, we're all sick of the main HDL languages. I just wish there were some consensus regarding the alternatives. Right now everyone seem to think that their language is the only sensible option. I guess time will tell though...

I think that the fact that we're reaching this "pain point" is a good thing, as is the fact that there are now several credible alternatives to VHDL/Verilog. I may be biased since I'm also working on a new programming language to design hardware called Cx (formerly C~) :-) I do think that each alternative has its merits, and it is possible for several to cohabit, much like in software you have several languages, each with its own strengths and weaknesses depending on your application (embedded, networking, games, web applications, etc.)

What I'm hoping for is that these languages will allow people without an electronic engineer degree (or years of experience with VHDL/Verilog) to design hardware. I agree with Andreas and Paul, community and collaboration are very important. And what better way to increase collaboration than to make code easier to write, and more importantly, easier to read?

adapteva
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Manager
Comparing the RISC-V to Epiphany
adapteva   8/11/2014 10:11:49 AM
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For fun, I did an quick analysis of the RISC-V ISA using the Epiphany archchitecture (another modern RISC machine) as a reference point. Adding a link to the summary here in case others might find it interesting/useful. (Too cumbersome to add the whole write-up as a comment to this thread)

http://www.adapteva.com/andreas-blog/analyzing-the-risc-v-instruction-set-architecture

If you have comments/corrections, add them to this thread instead of my site.

Paul A. Clayton
User Rank
CEO
Re: Comments from the OpenRISC project
Paul A. Clayton   8/11/2014 7:45:55 AM
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«"My main critisism of this however is that it has been done more or less behind closed doors, which unfortunately is far too common in academia, and therefore seems to suffer a lot from the NIH syndrome...You say you started in 2010 and yet we only hear about this now."

The RISC-V user spec v1.0 was published in 2011. It has since been cited at least 15 times, and we have presented work using RISC-V in a number of conferences and workshops. We also have at least 3 different external groups from around the world using RISC-V.  They found out about it on their own»

I may have first found out about RISC-V through a comp.arch post by Brett Davis (Message-ID: <ggtgp-434696.00282902122011@netnews.mchsi.com>; 2 Dec 2011). However, I could not find any way (other than contacting authors of papers) to offer suggestions or ask about rationales. I think only recently have people associated with RISC-V (and then only secondarily, i.e., non-Berkeley people) posted on comp.arch and that more as project announcements. (I realize comp.arch has suffered along with the decline of the rest of USENET, but I would not have thought posting an RFC there would have cost that much effort.)

A major project without a mailing list (seemingly only started  7 August 2014) or even a wiki does not seem very open to me. (It looks like the github repository was started in July 2013, but that is really only useful to hardware designers and even then requires a willingness to use Chisel. The number of people that can propose useful architectural and microarchitectural features is many times larger than the number of people that can use an HDL. I think I am among that number, but I was excluded—in effect, not intent—from contributing. I realize ideas are cheap and filtering out the dross consumes resources, but even a small contribution to the 10% that is inspiration would seem to be useful.)

Even if it was only the doors to the world outside academia that were closed (and by no means locked), this still seems a less than ideal approach for an open project, even if platform projects benefit from more of a cathedral than a bazaar design orientation. (A good cathedral design has one architect [rf. Ch. 4, Mythical Man-Month] but many builders and even broader community involvement. I believe even a poor villager who can only give honor to the builders contributes to the building: "To praise good actions heartily is in some measure to take part in them." [Francois Duc De La Rochefoucauld, Reflections; or Sentences and Moral Maxims, 432].)

Paul A. Clayton
User Rank
CEO
Re: commenting problems
Paul A. Clayton   8/11/2014 6:11:11 AM
NO RATINGS
"What is going on with this comment system? I'm keep getting 403 errors when I try to post something"

My guess based on your relatively high post frequency (recently) is that you are running into some kind of primitive spam filtering mechanism. Your "Rookie" status may (or may not) be a factor (i.e., I could see a filter considering long term involvement for the constraints placed on posting).

Olof Kindgren
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Rookie
Re: Comments from the OpenRISC project
Olof Kindgren   8/11/2014 5:55:05 AM
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Thank you for the clarifications. I realize that I made some claims without looking at the history of RISC-V. My apologies for that, and I will make sure to read more about this when I get the time. As Jeremy has already pointed out, RISC-V would make a lot of sense as an OpenRISC 1000 successor, especially given that our team is too small to develop and maintain a new ISA and the existing OpenRISC at the same time.

Regarding Chisel, we're all sick of the main HDL languages. I just wish there were some consensus regarding the alternatives. Right now everyone seem to think that their language is the only sensible option. I guess time will tell though...

And if you are interested in knowing more about what we're doing in the OpenRISC project, I will be speaking at FPGA world in Stockholm and Copenhagen next month, and the yearly OpenRISC conference will be in Munich in October. Hope to see you there!

_cpc_
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Rookie
Re: Comments from the OpenRISC project
_cpc_   8/11/2014 4:38:41 AM
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"My main critisism of this however is that it has been done more or less behind closed doors, which unfortunately is far too common in academia, and therefore seems to suffer a lot from the NIH syndrome...You say you started in 2010 and yet we only hear about this now."


The RISC-V user spec v1.0 was published in 2011. It has since been cited at least 15 times, and we have presented work using RISC-V in a number of conferences and workshops. We also have at least 3 different external groups from around the world using RISC-V.  They found out about it on their own and decided it was the superior option for their needs. Also, you should read the spec; it's a very enjoyable read (imo) and it lays out both the history of RISC-V (i.e., its gentle evolution over 20 years) and a list of external contributors who have provided invaluable feedback on the ISA. 

You can learn more about chisel at chisel.eecs.berkeley.edu.  We got sick of HDLs getting in our way of building processors, and we felt that all existing solutions were inferior to creating our own. The Chisel DAC 2012 paper's intro explains this in more detail.


Regarding OpenRISC, I'm not in any position to make a claim on which ISA a new user in 2014 should choose.  What I can say was that, in 2010, OpenRISC was not a viable solution for us to use in our research. We needed 64b, we needed a LOT more opcode space for research extensions, no delayed branches, and we needed 2008-revised IEEE 754 FP.  That meant writing a new ISA.

Olof Kindgren
User Rank
Rookie
commenting problems
Olof Kindgren   8/11/2014 3:54:13 AM
NO RATINGS
What is going on with this comment system? I'm keep getting 403 errors when I try to post something

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