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AD2010
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DRAM size and SRAM cell size
AD2010   8/11/2014 1:18:31 PM
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 I myself have worked in DRAM foundry and I know that 1 transistor and 1 capacitor  is always smaller than 6  Transistor SRAM for a given technology node.

So I am not making that mistake at all.

What I am saying is that this eDRAM cell size would correspond  to 1x SRAM cell size and the point is that SRAM is taking lot of real estate  and is not shrinking well and does not provide enough bandwidth.

 

So by switching to external DRAM from SRAM, INTEL is having lot of advantage.

Probably IBM came to the same conclusion as Intel and made eDRAM since many years. 

ssliva
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Re: what is essential about this Intel's eDRAM
ssliva   8/11/2014 1:07:28 PM
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@AD2010 by using my elite Googling skills, it appears that Power8 has been available since June 10 2014.


eDRAM cells are much smaller than SRAM cells in the same technology, regardless of Intel, IBM, NEC or whomever is making it.  Hopefully you aren't under the misapprehension that Intel is the first IDM to make DRAM cells smaller than SRAM.

Violoncelles
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Re: what is essential about this Intel's eDRAM
Violoncelles   8/11/2014 9:54:38 AM
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Toshiba and before it became Infineon , Siemens Semiconductor , were also using a deep Trench technology for the DRAM.

Violoncelles
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Re: Intel eDRAM vs IBM
Violoncelles   8/11/2014 9:51:09 AM
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IBM latest eDRAM is 22 nm on SOI with trench technology (for instance on POWER 8). This doesn't mean that the half pitch on the eDRAM macro is 22 nm , but the logic besides the eDRAM macro on the same chip is a 22 nm technology.

AD2010
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what is essential about this Intel's eDRAM
AD2010   8/11/2014 9:28:42 AM
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Yes IBM was a pioneer in eDRAM and particularly TRENCH capacitor technology, which was later used by Infineon-Qimonda.  I do not know who has older patents on eDRAM, is it IBM or INTEL? And MIM Capacitor can be formed regardless of capacitor frame structure (stack or trench).

 Regarding this eDRAM device from Intel, the concept of using stacked capacitors is not new, also the idea of placing the stacked capacitor between the interconnects is not novel;

however, we are forgetting the most interesting point in this device and that is  the eDRAM cell size is way smaller than the most advanced SRAM cell and there is plenty of room to extend the memory size without changing the technology node. Also Intel claims very good retention properties of this device, which they attribute to the trigate structure of the access transistors.

I am sure Power 8 processor of IBM with 22 nm node process would be a milestone in technology but I do not know if this product is already available in the market?

 

Violoncelles
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Re: on chip eDRAM at IBM
Violoncelles   8/11/2014 6:27:42 AM
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IBM use a deep trench for the capacitor while Intel has a stacked capacitor.

Violoncelles
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Re: Intel eDRAM vs IBM
Violoncelles   8/11/2014 6:24:08 AM
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IBM eDRAM technology started with the 0.18um node (a Cu technology with deep trench for the capacitor). This was avalaible in year 2000 , so it's more than a decade old.

Paul A. Clayton
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Re: Intel eDRAM vs IBM
Paul A. Clayton   8/11/2014 6:02:07 AM
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Smaller physical size also means lower latency (at a given large capacity) despite higher cell access latency. (Welcome to the world where wire delay is increasingly important ☺)

ssliva
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Freelancer
Re: Intel eDRAM vs IBM
ssliva   8/10/2014 11:58:12 PM
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SOI and trench eDRAM neither required together or mutually exclusive.


Power8 has IBM eDRAM in 22nm.

AD2010
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IBM and SOI
AD2010   8/8/2014 5:53:50 PM
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Is IBM's trench approach tied to its use of SOI?

Most likely yes, for technologies below 45 nm node, the leakage is very high. Ultra thin SOI can reduce leakage.

IBM has lot of expertise on SOI, so if IBM continues to function as a foundry then it will use SOI.

Papers in VLSI and IEDM suggest that eventually IBM will use finFETS on SOI around 14 nm...

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