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rick merritt
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Google already eyeing IBM Power 8
rick merritt   8/28/2014 10:28:45 AM
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Interestingly the talk was given on the Google campus where engineers are developing Power 8 boards, eyeing possibilities for its data centers.

wilber_xbox
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Re: Google already eyeing IBM Power 8
wilber_xbox   8/28/2014 12:06:52 PM
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Yes Rick, and with others also modifying their server and storage profile the market for data centers, warehouses, server and storage is pretty exciting for coming years. The goal will be to make on-chip communication work by integrating silicon based photonic devices for faster communication and computation.

AZskibum
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GPUs before ASICs
AZskibum   8/28/2014 1:16:11 PM
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In the mean time, before all those new custom ASICs get to production, a great deal of acceleration can be realized by incorporating GPUs into the data center.

rick merritt
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Re: GPUs before ASICs
rick merritt   8/28/2014 4:38:18 PM
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@AZskibum: I beg to disagree. At Hot Chips, Microsoft and Baidu researchers both said they looked at GPUs but found them too hot and costly.

They are both going with FPGAs for some specific apps, but both complain they are still too hard to program.

rick merritt
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Re: Google already eyeing IBM Power 8
rick merritt   8/28/2014 4:39:19 PM
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@Wilbur: Indeed Patterson and team will put optical links (sans lasers) on their ASICs and expects others to do so come ~2020.

docdivakar
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Re: GPUs before ASICs
docdivakar   8/28/2014 4:56:31 PM
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@Rick: not so fast! @AZskibum does have a point in applications similar to those that FBook is pushing thru its Wedge reference design. Wedge does include micro servers that can benefit from GPU's, thermal effects notwithstanding.

MP Divakar

DrFPGA
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SPU not GPU
DrFPGA   8/29/2014 11:01:25 AM
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Seems like the argument is for software processing units. Identify the core functions that are currently limiting software bandwidth like garbage collection and fix them with specialized hardware functions... Let's not call these hardware elements ASICs let's call them SPUs.

rick merritt
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Re: SPU not GPU
rick merritt   8/29/2014 12:43:17 PM
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@DrFPGA: In the short term, Fbook is clear it will support x86 and ARM server SoCs in the Group Hug board in Wedge.

In a side discussion, Yuval suggested FPGAs or other programmable elements are not ruled out by any means depending on what apps develop.

AZskibum
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Re: GPUs before ASICs
AZskibum   8/31/2014 10:02:50 PM
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FPGA's are hardly different from ASICs in this context, besides being reprogrammable. Either way, with FPGAs or ASICs we're talking about implementing designs that specifically target the acceleration of particular processing tasks in a datacenter.

GPUs, on the other hand, have a lot of library support for parallel high-performance computing.

An FPGA or an ASIC could potentially offer lower power and/or lower cost acceleration -- once you have decided exactly what to implement in that silicon and have developed & debugged the library functions to allow your existing software stack ot access the new silicon.

With GPUs, all of the exists already, which is why I titled my post "GPUs before ASICs."

 

 

krisi
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Re: GPUs before ASICs
krisi   9/8/2014 3:50:50 PM
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"FPGA's are hardly different from ASICs"...well, ASICs can pack up way more transistors for one



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As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.

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