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ThomasEnsergueix
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Some Complementary Information
ThomasEnsergueix   9/26/2014 11:53:12 AM
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Thank you very much Jessica for your article.

For the reader benefit, I would like to add some light on information included in the article.

The indicative power and size mentioned in one of the last paragraphs are both representative of a complete microcontroller based on the Cortex-M7, using a mainstream process with embedded flash (i.e. not the processor only). In other words, it includes the size and power of the volatile and non-volatile on-chip memories, of the IOs, and also of the digital and analogue peripherals.

When comparing with the Cortex-R, it would be more precise to state it's "more energy-efficient" when run at comparable frequencies. As for performance, Cortex-R can achieve by design higher frequency thanks to their longer pipeline and can thus offer "higher absolute performance".

 

Thanks to Jessica and EETimes for all these great articles!

Thomas ENSERGUEIX (ARM)

 

 

wilber_xbox
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Re: diverse requirements
wilber_xbox   9/26/2014 11:32:47 AM
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WOW, this article has become a source of PR opportunity for many. Good!

Joseph Yiu
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Re: diverse requirements
Joseph Yiu   9/25/2014 4:43:06 AM
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@pica

Yes, cache ECC implementation option is available.

regards,

Joseph

Michael.Markowitz
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Re: what about DSP?
Michael.Markowitz   9/24/2014 4:37:20 PM
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Pinaz, I think you'll be pleasantly surprised by the DSP performance of the M7. Can I suggest you check out ST's implementation? (Disclosure: I am an ST PR guy)

Michael.Markowitz
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Re: diverse requirements
Michael.Markowitz   9/24/2014 4:32:45 PM
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pica0, perhaps the STM32 F7 is the ARM Cortex M7 that will suit your needs. 1000 CoreMark. The press release and product pages are posted on teh ST.com web site.

We'll demo the MCU at #ARMTechCon next week and we are already sampling to lead customers! (Disclosure: I'm a PR guy for ST).

pica0
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diverse requirements
pica0   9/24/2014 3:52:28 PM
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I require 1000+ DMIPS in an ISO 61508 SIL3 maybe SIL4 context.

ECC caches -- I require ECC caches -- are provided by the Cortex M7 design.

A Cortex M7 based lockstep design would be nice for my needs. If not availabe, I may solve it with software based double execution.

I will ask the SoC makers about their Cortex M7 plans :-)

/pica

 

pica0
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diverse requirements
pica0   9/24/2014 3:52:27 PM
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I require 1000+ DMIPS in an ISO 61508 SIL3 maybe SIL4 context.

ECC caches -- I require ECC caches -- are provided by the Cortex M7 design.

A Cortex M7 based lockstep design would be nice for my needs. If not availabe, I may solve it with software based double execution.

I will ask the SoC makers about their Cortex M7 plans :-)

/pica

 

pinaz
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what about DSP?
pinaz   9/24/2014 3:41:00 PM
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I'd much rather see ARM focus on improved DSP functionality in its Cortex-M family.  The "DSP" Cortex-M4 is 4-5x faster than a Cortex-M3 at FFTs, but the Cortex-M4 seems to be 8-10x slower than a Blackfin.  I'd rather see an M0-based "M2" Cortex with really good FFT performance than smartphone processor features adapted for the high-end embedded market.  ARM has dipped its toe in the DSP waters, but hasn't yet commited to it in a big way.

 

Wilco1
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CEO
Re: Lights too slow?
Wilco1   9/24/2014 3:40:18 PM
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You're right, slow light switches etc are typically not due to a slow micro controller, even a 4-bit 1MHz MCU will be fast enough for that.

Changing channels on a digital decoder relies on MPEG encoder sending full frames every now and again, as the decoder can only start showing the channel after it sees such a frame. This is an issue with broadcasters not encoding these frames often enough in order to reduce bandwidth for digital TV and not at all an issue with slow CPUs or software (in any case all of the decoding is done by a dedicated hardware decoder).

The slow startup time of modern TV's is an issue with the OS booting, so there faster flash and CPU should help.

Airbags, engine control, harddiscs are hard realtime problems requiring low predictable interrupt latency. The latter 2 have typically used Cortex-R4 for performance but it seems now an M7 should be more than fast enough.

Joseph Yiu
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Re: Lights too slow?
Joseph Yiu   9/24/2014 3:26:35 PM
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@pica

Yes, there is a lockstep option.

ARM Compiler 6 already have LLVM. But first release is focus on 64-bit application processors.

@Jessica

A lot of the technologies (e.g. dual issue pipeline, optional caches, optional double precision FPU) arguably already available in other highend processors.  However, putting all these in a much smaller processor footprint is a big challenge. At the same time, the design remain deterministics, and is very easy to use (almost everything can be programmed in C including interrupt handlers, and simple programmer's model based on the existing Cortex-M architecture).

For system designers, in addition to able to do more with a mass market MCU product, it also means you could consolidate multiple processors (e.g. some audio products today use a MCU + DSP, which could be replaced with a single Cortex-M7). They can also have a much larger system memory size without losting performance (due to integrate L1 cache, you can execute code from external memories with good performance, including serial flash like QuadSPI).

Things will get even more interesting when chip designers start to use more advanced process nodes in highend MCUs.

@Frank

Of course, there are many applications that doesn't need such high performance. That's why ARM's wide range of Cortex-M processor products is important. You can get a tiny processor for ultra low power IoT sensor, to high performance microcontrollers, all based on a consistence architecture.

Hope this helps answer your questions. regards,

Joseph

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