Embedded Systems Conference
Breaking News
Comments
Newest First | Oldest First | Threaded View
Rizzatti
User Rank
Author
Compilation Time
Rizzatti   1/12/2015 4:45:40 PM
NO RATINGS

DBSingh, in principle I like disruptions as you do. Whether Tabula's FPGA offers a viable building block for a low cost emulator or not it seems to me a bit premature to make a call. I will keep an eye on it.

Sanjib and Tobias, my article focused on capacity of emulators, mentioning compilation time as a side effect. I did not touch performance (speed of emulation) nor cost. Let me address those in future articles.

Regarding compilation, the process evolves through multiple stages, including synthesis, partitioning, and, for the FPGA-based machines, place&route. It should be noted that all three stages can be parallelized on farms of PCs, dramatically accelerating the overall compilation time.

As for total compilation time, assuming the FPGA-based emulators have access to a large farm of PCs, a 100 million gate design may compile in less than two hours on the processor-based emulator, about three hours on the custom-FPGA-based emulator, and 15 to 20 hours on the commercial FPGA-based emulator.

DBSingh180
User Rank
Author
Re: How does Tabula's DesignInsight affect things?
DBSingh180   1/11/2015 10:43:24 AM
NO RATINGS
Hi Lauro,

I agree with Max, that the announcement by Tabula is a big one.

Both for prototyping and Emulation. The capability to view all nets and possibility ofmodifying design behavior by forcing nets is huge.

Although the readback feature from Xilinx can be used to reconstruct the design behavior for similar effect, but does make running design slower, which is an advantage with Tabula.  

This definitely is exciting as it open gates for smaller players to develop innovative and fast emulation solutions and would threaten the Big "3" sitting pretty with their emulation solutions.

I personally like disruptions in techonolgy as they are signs of new begining and exciting tomorrow.

 

 

Sanjib.A
User Rank
Author
Cost of the hardware vs cost of development
Sanjib.A   1/10/2015 12:45:45 PM
NO RATINGS

@Lauro: The information about the comparison of cost of these hardware emulator platforms would also be useful. I assume, the cost of the custom-FPGA based emulator platform would be more costlier as compared to the processor based platforms having similar capacity, whereas commercial FPGA based emulators would be the cheapest? 

Tobias Strauch, EDAptix
User Rank
Author
Compile times
Tobias Strauch, EDAptix   1/9/2015 5:42:28 PM
NO RATINGS
Hi Lauro,


I don't know the current compile time numbers, but are you sure that a processor based system has only a little bit faster compile time than a custom FPGA based one ?

It would be great to know the actual comparison numbers for realistic execution speeds as well. What're your thoughts on this and how will these numbers change in the future ?


Cheers, Tobias

Clive
User Rank
Author
How does Tabula's DesignInsight affect things?
Clive"Max"Maxfield   1/9/2015 5:08:54 PM
NO RATINGS
Hi Lauro -- did you see my column Tabula's DesignInsight Offers 100% Observability Into 3PLDs?

How do you think thsi technology might affect FPGA-based hardware emulators?



Top Comments of the Week
Like Us on Facebook

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)
EE Life
Frankenstein's Fix, Teardowns, Sideshows, Design Contests, Reader Content & More
Max Maxfield

March 28 is Arduino Day -- Break Out the Party Hats!
Max Maxfield
6 comments
Well, here's a bit of a conundrum. I just received an email from my chum David Ashton who hails from the "Unfinished Continent" Down Under. David's message was short and sweet; all he said ...

Bernard Cole

A Book For All Reasons
Bernard Cole
1 Comment
Robert Oshana's recent book "Software Engineering for Embedded Systems (Newnes/Elsevier)," written and edited with Mark Kraeling, is a 'book for all reasons.' At almost 1,200 pages, it ...

Martin Rowe

Leonard Nimoy, We'll Miss you
Martin Rowe
5 comments
Like many of you, I was saddened to hear the news of Leonard Nimoy's death. His Star Trek character Mr. Spock was an inspiration to many of us who entered technical fields.

Rich Quinnell

Making the Grade in Industrial Design
Rich Quinnell
16 comments
As every developer knows, there are the paper specifications for a product design, and then there are the real requirements. The paper specs are dry, bland, and rigidly numeric, making ...

Special Video Section
After a four-year absence, Infineon returns to Mobile World ...
A laptop’s 65-watt adapter can be made 6 times smaller and ...
An industry network should have device and data security at ...
The LTC2975 is a four-channel PMBus Power System Manager ...
In this video, a new high speed CMOS output comparator ...
The LT8640 is a 42V, 5A synchronous step-down regulator ...
The LTC2000 high-speed DAC has low noise and excellent ...
How do you protect the load and ensure output continues to ...
General-purpose DACs have applications in instrumentation, ...
Linear Technology demonstrates its latest measurement ...
10:29
Demos from Maxim Integrated at Electronica 2014 show ...
Bosch CEO Stefan Finkbeiner shows off latest combo and ...
STMicroelectronics demoed this simple gesture control ...
Keysight shows you what signals lurk in real-time at 510MHz ...
TE Connectivity's clear-plastic, full-size model car shows ...
Why culture makes Linear Tech a winner.
Recently formed Architects of Modern Power consortium ...
Specially modified Corvette C7 Stingray responds to ex Indy ...
Avago’s ACPL-K30T is the first solid-state driver qualified ...
NXP launches its line of multi-gate, multifunction, ...
Radio
LATEST ARCHIVED BROADCAST
EE Times Senior Technical Editor Martin Rowe will interview EMC engineer Kenneth Wyatt.
Flash Poll