DBSingh, in principle I like disruptions as you do. Whether Tabula's FPGA offers a viable building block for a low cost emulator or not it seems to me a bit premature to make a call. I will keep an eye on it.
Sanjib and Tobias, my article focused on capacity of emulators, mentioning compilation time as a side effect. I did not touch performance (speed of emulation) nor cost. Let me address those in future articles.
Regarding compilation, the process evolves through multiple stages, including synthesis, partitioning, and, for the FPGA-based machines, place&route. It should be noted that all three stages can be parallelized on farms of PCs, dramatically accelerating the overall compilation time.
As for total compilation time, assuming the FPGA-based emulators have access to a large farm of PCs, a 100 million gate design may compile in less than two hours on the processor-based emulator, about three hours on the custom-FPGA-based emulator, and 15 to 20 hours on the commercial FPGA-based emulator.
@Lauro: The information about the comparison of cost of these hardware emulator platforms would also be useful. I assume, the cost of the custom-FPGA based emulator platform would be more costlier as compared to the processor based platforms having similar capacity, whereas commercial FPGA based emulators would be the cheapest?
As we unveil EE Times’ 2015 Silicon 60 list, journalist & Silicon 60 researcher Peter Clarke hosts a conversation on startups in the electronics industry. Panelists Dan Armbrust (investment firm Silicon Catalyst), Andrew Kau (venture capital firm Walden International), and Stan Boland (successful serial entrepreneur, former CEO of Neul, Icera) join in the live debate.