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FPGA survey sees sunset for gate arrays, continued dominance by Xilinx, Altera
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EE Times


COLORADO SPRINGS, Colo. " The long-anticipated tipping point where FPGAs replace gate arrays is upon us, with the obsolescence of cell-based ASICs and structured arrays not far behind, according to an FPGA User Survey conducted by EE Times, Piper-Jaffray, and the FPGA Mission Assurance Center at Sandia National Labs.

The survey shows continuing dominance of the market by Xilinx Inc. and Altera Corp., with Actel Corp. the only FPGA vendor to move into double-digit user support in some categories.

The survey, conducted by Wilson Research Group from a base of more than 400 qualified hardware and software engineers, indicates continuing difficulty in recruiting engineers familiar with FPGA design. Many projects experience at least 30 days' delay in a system design, with the most common result being a delay in an overall program. While the leading cause of such delays is a system design complexity, the second most cited problem is a difficulty to recruit and train engineers familiar with FPGAs.

In listing reasons for choosing FPGAs over ASICs, more than 50 percent of respondents cited "time to market" and "ASIC NRE costs." Also high among the citations were "production volumes" and "cost of design tools."

Users expressed the most dissatisfaction in FPGA design tools in routing and timing estimation, where close to 50 percent said the tools could be better. On several fronts regarding the physical qualities of FPGAs, Xilinx maintained a significant lead in the 40-percent range, followed by Altera in the high 20s. The one realm where Actel was listed by more than 20 percent of respondents was in power consumption.

A full survey can be purchased in late October at the EE Times Market Intelligence Unit site.






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