NetSeminars are multimedia, interactive presentations from leading companies in the electronics industry. You don't have to travel to attend these free briefings.

You have quick, easy access to detailed technical information from anywhere in the world on demand--live or from the archive. Below is a listing of the upcoming NetSeminars, as well as a selection of some from the archive. Simply click on the one you're interested in to register and watch. Click here to view all NetSeminars

Upcoming Electronics NetSeminars

October 2006

The Importance of Tools in Multi-core Development
Tuesday October 24, 2006 1pm ET/10am PT
Sponsored by QNX
The advent of multi-core processors is changing the nature of software development. Developers are now faced with migrating legacy code to this new architecture. This session explores the various multi-processing models and their applicability to specific applications. It then reviews the requirements multi-core development imposes on tools from initial partitioning of software, through characterization and debugging, to optimization and tuning.

Eliminate communication bottlenecks with the LPC23xx family
Wed, Oct 25, 2006 11:00 AM ET/8am PT
Sponsored by NXP
Join our Netseminar on October 25th and discover NXP Semiconductors' latest microcontroller family. Our high-performance LPC23xx microcontrollers have been developed to manage the multiple asynchronous high-speed channels often found in communications and industrial networking. The seminar describes the numerous product features and the benefits they bring, and gives an overview of available support including development tools.

Minimizing Crosstalk in High Speed Interconnects using Measurement-based Modeling
Thursday October 26 1pm ET/10am PT
Sponsored by Agilent Technologies
This presentation will discuss a highly accurate test methodology using a multiport vector network analyzer with Physical Layer Test System software to identify and analyze crosstalk generating structures.

Reduce serial I/O power, cost, and complexity with Virtex-5 LXT FPGAs
Thursday October 26 Thursday Oct 26
Sponsored by Xilinx
Xilinx 65nm Virtex™-5 LXT FPGAs incorporate serial transceivers, built-in PCI Express® endpoint blocks, and Ethernet media access controller blocks. Learn how to build standards-compliant serial interfaces faster than you thought possible with Xilinx development and debug tools, design kits, IP, characterization reports, and more.

Programming Digital Video using DaVinci™ Technology and MontaVista Linux
Tuesday, October 31 8:00am PT/11:00am ET
Sponsored by Texas Instruments
Live Webcast: Programming Digital Video using DaVinci™ Technology and MontaVista Linux
Topics include:
- How to build, deploy and debug your video application using MontaVista Linux Pro 4.0
- Using the MontaVista Linux operating system in conjunction with TIýs DaVinci processors, Digital Media Software and Linux-enabled development tools to simplify development of digital video systems.
- Q & A session

Reduce Software Development Costs through Partitioning
Tuesday October 31, 2006 1pm ET/10am PT
Sponsored by QNX
The complexity of modern software development often necessitates parallel development across multiple teams to reduce time to market. With this approach, however, problems invariably arise at system integration time when sub systems that performed correctly in isolation begin competing with one another for system resources. This session explains how computing-resource guarantees or partitioning can greatly simplify integration, reduce cost, and accelerate time to market.

Applied Formal Verification Planning: 101
Tuesday October 31, 2006 11am ET/8am PT
Sponsored by Mentor Graphics
Moving beyond theoretical discussions, this seminar will take you to the next level of understanding in the formal verification planning process. After introducing a systematic set of steps for effective formal verification planning, the discussion quickly moves beyond mere concepts by applying the process to a real detailed example of generating a comprehensive formal friendly property set.
The conclusion of this seminar introduces four strategies you might choose from to verify our property set, depending on your goals and available resources.

November 2006

NXP Media Processors, Overview and Update
Mon, Nov 06, 2006 2pm ET/11am PT
Sponsored by NXP
Nexperia media processors handle video, audio, graphics, communications, and control processing-all on a single chip. This seminar will explore the applications supported by connected media processors, including Digital Media Adapters, Digital Picture Frames, Digital Media Recorders, Video Security, Videophones, Video Streamers, and Personal Video Recorders. Lower overall cost and dramatically reduce time-to-market with our higher integrated reference designs. Learn more about NXP Semiconductors' media processor portfolio, roadmap, and software offering.

Using Diamond Standard Processors in AMBA-based SOCs
Tuesday, November 7th 9:00am PT/Noon ET
Sponsored by Tensilica, Inc.
Tensilica's Diamond Standard processors offer lower power and higher performance in AMBA-based SOCs. In this webcast, we will discuss the advantages of Tensilica's Diamond Standard processors when used for control, audio, DSP, or as a high-performance core in AMBA-based SOCs. Detailed information will be provided on each of the cores in the Diamond Standard family as well as industry leading power and performance specs. Anyone needing a processor, DSP, or audio solution for their SOC should attend.

Increasing Battery Life in Wireless 3G Handsets and Notebook Computers
Wednesday Nov 8 Noon ET/9am PT
Sponsored by ANADIGICS
ANADIGICS, a leading supplier of wireless and broadband RF products, addresses the issues of power consumption in 3G wireless devices. Learn how you can extend handset battery life with the Companyýs unique HELP3™ power amplifiers ý allowing you customers to meet stringent talk-time requirements without sacrificing multimedia features.

Improve Embedded System Stability and Performance through Memory Analysis Tools
Tuesday November 14, 2006 1pm ET/10am PT
Sponsored by QNX
Embedded systems are becoming more and more complex; memory must now be carefully managed for performance and long-term stability. This web seminar examines memory analysis tools and how they can be used to observe system behavior over time and improve software and system quality. Learn how to reduce your time to market by detecting hard-to-find and debug errors, how to optimize memory performance, and how to detect and fix common memory errors.

Design Considerations in Specifying Data Converters for High Speed Applications
Wednesday November 15 Noon ET/9am PT
Sponsored by Analog Devices, Inc. and Avnet Electronics Marketing
When designing high speed signal paths in applications ranging from radio to imaging, it's important for the system designer to understand not only the benefits and tradeoffs among the various types of high speed data converter architectures available, but also what performance specifications are important, and how end-system performance can be impacted by data converter specs. This seminar will cover important design considerations for understanding, selecting, and applying high speed A/D converters and D/A converters.

December 2006

Archived Electronics NetSeminars

October 2006

WEEE - How much is this going to cost me?
Wednesday, October 4, 2006 11 am PT / 2 pm ET
Sponsored by EMA Design Automation and Ageus Solutions
Please join us for a comprehensive overview of the financial obligations of the WEEE directive and emerging US E-Waste legislation. Compliance with the EU WEEE and US E-Waste legislation is more than just joining a collection system and affixing a sticker to a product.

Capture the Power of ARM9 in Flash
Monday October 9 Noon ET/9am PT
Sponsored by STMicroelectronics
STMicroelectronics has become the first company to use the powerful ARM9 CPU core in a general-purpose Flash Microcontroller, opening endless possibilities to embedded system designers by making networking and other demanding applications easy and affordable. If you would like to find out how you can benefit from using STR9 MCUs in your products, this seminar is for you.

Clock Jitter Analysis with Femto-Second Resolution
Tuesday October 10th 1pm ET / 10am PT
Sponsored by Agilent Technologies
In this Webcast we concentrate on clock-jitter issues relevant to serial data systems. After an introduction to the problems that jitter causes in serial data applications, the role of reference clocks and how their jitter affects the rest of a system is covered. A new tool which can achieve remarkable ultra-low jitter measurement capabilities on both random jitter (RJ) and periodic jitter (PJ) is mainly explained. We conclude with a survey of jitter analysis equipment.

Digital Power: The Facts Behind the Phenomenon
Wednesday October 11 Noon ET/9am PT
Sponsored by Analog Devices, Inc.
As a practical guide to digital power design, this seminar defines and explores the differences between digitally-controlled solutions, and digitally-managed solutions. The industry trends that are driving progress towards digital power architectures are discussed and real-world examples of digital power implementations are analyzed in terms of architecture and benefits - such as reliability, cost improvements, design flexibility, and efficiencies.

Industry's First Low-Cost FPGA with SERDES: LatticeECP2M
Wednesday, October 11, 2006 11 am PT / 2 pm ET
Sponsored by Lattice Semiconductor
The new LatticeECP2M family brings SERDES to low-cost FPGAs by adding 4 to 16 channels of 3.125Gbps SERDES to a LUT4-based FPGA fabric. Attend this NetSeminar and learn to design with a SERDES-based FPGA solution that is low-cost, high-performance, and full-featured with DDR2 support, DSP, and very high RAM capacity.

Analog eLab: PCB Layout Techniques for Switching Regulators
Wednesday, October 11, 2006 9 am PT / 12 noon ET
Sponsored by Texas Instruments and Avnet
The standard three-terminal linear regulator can be placed on a PCB with few issues. Switching regulators are different. This e-Lab demonstrates how to minimize parasitic components, how to determine what traces create noise and what traces are susceptible to noise within a switching regulator.

AMCC Packet Processors Serving WiFi Controller Market
Thursday, October 12, 2006 11 am PT / 2 pm ET
Sponsored by AMCC
AMCC continues its leadership in delivering highly integrated data-control path processing solutions serving the WLAN Controller segment. The innovative features of the Enterprise WLAN Controller development will allow expansion into segments such as public access (Hot Spot) controllers, Unified Small and Medium Business (SMB) wired/WiFi switching platforms or WiMESH Portal platforms.

Multi-Gigabit Network Data Plane Acceleration
Tuesday, October 17 11:00am PT/2:00pm ET
Sponsored by Teja Technologies and Netronome Systems
New network services and higher traffic are pushing dataplane performance, making it increasingly important to deliver high-speed network dataplanes faster than ever. Join us to learn how Teja Technology and Netronome can help you accelerate your dataplane development using Teja NP optimized for the new Netronome NFE-i8000 board.

Digital Phosphor™ Technology in Real-Time Spectrum Analyzers: a Revolutionary Tool for Signal Discovery
Wednesday October 18 3pm ET/Noon PT
Sponsored by Tektronix
Detection is the first step for characterizing, diagnosing, understanding and resolving any problem relating to time-variant signals. Tektronix-patented Digital Phosphor™ technology on the new RSA6100A series Real-Time Spectrum Analyzers (RTSA), reveals signal details that are completely missed by conventional signal analyzers and vector signal analyzers. Full-motion DPX™ Spectrum's live RF display shows signals never seen before, giving users instant insight and greatly accelerating discovery and diagnosis.

Power Loss Calculations in DC/DC Converter Design
Wednesday, October 18 11:00am PT/2:00pm ET
Sponsored by Texas Instruments
Increasing power densities in DC-DC converters are nothing new and the trend continues. This leads to ever increasing demands for lower power dissipation in the converter to combat thermal problems. This talk goes through a typical DC-DC buck converter and examines the power loss in each component.

September 2006

Enabling Product Differentiation in Industrial, Scientific, and Medical Applications with Xilinx CPLDs
September 7, 2006 2:00pm BST/3:00pm CEST
Sponsored by Xilinx
Whether you are designing products for industrial, scientific or medical, Xilinx CPLDs provide the flexibility to add new features such as motor control, memory interfacing, voltage level shifting and I/O port expansion to your design. This webcast, broadcasting live at two convenient times, will walk you through the critical aspects of designing CPLDs into ISM applications.

Enabling Product Differentiation in Industrial, Scientific, and Medical Applications with Xilinx CPLDs
September 7, 2006 2:00pm ET/11:00am PT
Sponsored by Xilinx
Whether you are designing products for industrial, scientific or medical, Xilinx CPLDs provide the flexibility to add new features such as motor control, memory interfacing, voltage level shifting and I/O port expansion to your design. This webcast, broadcasting live at two convenient times, will walk you through the critical aspects of designing CPLDs into ISM applications.

How to Survive a RoHS Compliance Audit
Tuesday September 12, 2006 11:00 am PT / 2 pm ET
Sponsored by EMA Design Automation
The July 1, 2006 EU deadline has come and goneýis your company prepared to defend your RoHS compliance to each EU member state? Inadequate compliance data may have a domino effect on your entire organization. Learn how to survive an EU audit and generate due diligence reports-with just a click of a button!

Electronics Supply & Manufacturing Editorial NetSeminar: Innovation in Real Time
Tuesday, September 12, 2006 Noon ET/9:00am PT
Sponsored by IBM
According to the April 2006, Business Week cover story featuring Boston Consulting Group, innovators over the past ten years have been able to hold and grow profit margin at a much higher rate than the non-innovative companies. So how are leading companies tackling innovation? Industry consultants, editors, academia are observing leading technology companies that are leveraging collaborative innovation. It's a trend that is here today and results are starting to show highly successful companies can't afford not to collaborate. Join Bruce Rayner, Contributing Editor to Electronics Supply & Manufacturing and Director of Research and Consulting at Technology Forecasters Inc., for the second NetSeminar in the Collaborative Innovation series, as he leads a discussion with specific studies on how innovative companies and market leaders have made collaborative innovation work for them.

AMCC PowerPC Solutions for Low Cost, Enterprise Class Wireless Access Points
September 13, 2006 11:00 am PT / 2 pm ET
Sponsored by AMCC and TeamF1
AMCC, in cooperation with TeamF1, demonstrates a WLAN Access Point equipped with Enterprise-class software features. Working with TeamF1, AMCC has integrated TeamF1's Air Secure Access Point software or "ASAP" onto AMCC's "Taihu" development platform - a low-cost, easy-to-use evaluation kit for AMCC's highly popular, PowerPC 405EP processor.

Don't Lose Your Current. Learn about Passive Parts for Power Supply Applications!
Tuesday September 19, 2006 9am PT/Noon ET
Sponsored by TTI
Once again TTI sponsors another installment of its popular Technical Seminar Series, "Be Smart - Choose the Right Part." Log on and hear what leading-edge manufacturers AVX, KEMET, and Panasonic have to say about their latest offering for power supplies. This seminar will be moderated by TTI's Mark Burr-Lonnon. Dennis Zogbi from Paumanok Publications will provide valuable market insight, and the suppliers will share the key focus design parameters behind their best, newest, and key passive components.

Connecting PCB Design to the Corporate Enterprise
Tuesday September 19 2:00pm ET/11:00am PT
Sponsored by ENOVIA MatrixOne
PCB design and manufacturing functions are increasingly occurring outside the walls of a single organization. Come to this webcast to learn a new way for PCB development teams to collaborate during the board design process that allows them to collect, track, protect and deliver product design information seamlessly across EDA systems and other enterprise applications.

Learn How to Effectively Apply SysML to Your Systems Engineering Challenges with Guest Presenter: Dr. Hans-Peter Hoffmann
Wed, Sep 20, 2006 7amPT/10am ET
Sponsored by Telelogic
* What makes up the SysML?
* How can I best apply SysML while working on actual System Engineering projects?
Please join our live webcast to learn how to apply SysML to increase productivity and deliver real world systems engineering project results.

Learn How to Effectively Apply SysML to Your Systems Engineering Challenges with Guest Presenter: Dr. Hans-Peter Hoffmann
Wed, Sep 20, 2006 11amPT/2pm ET
Sponsored by Telelogic
* What makes up the SysML?
* How can I best apply SysML while working on actual System Engineering projects?
Please join our live webcast to learn how to apply SysML to increase productivity and deliver real world systems engineering project results.

New FPGAs Marry Digital and Analog Clocking Technologies to Simplify High-Performance Design
Thursday September 21, 2006 2pm ET / 11am PT
Sponsored by Xilinx
Xilinx Virtex™-5 FPGAs incorporate a new clock management tile (CMT) combining digital and analog technologies to give designers the best of both worlds. Learn how to use DCM and PLL blocks together to generate derived clocks with precise phase control and low jitter, achieving better performance than either technology can provide alone.

The Performance Benefits of RapidIO enabled TI DSPs in ATCA
Thursday September 21, 2006 9 am PT / 12 noon ET
Sponsored by Mercury Computer Systems
This webinar will discuss RapidIO based board and system level solutions that will enable OEMs to address of next generation application platforms. In addition, detailed performance data will be presented under various dataflow configurations using either RapidIO or Gigabit Ethernet as the transport mechanism.

Design and Characterization of Discontinuous RF/uW Passive Components Using EEsof's New full 3D Electromagnetic Simulator
Thursday September 21, 2006 10:00am PT/1:00pm ET
Sponsored by Agilent Technologies
This webcast will show through the use of two examples of widely used, though often poorly modeled components, how to accurately use a 3D EM simulator to model structures poorly modeled by other means, and then how to effectively bring those results back into ADS circuit design environment in order to integrate them with the rest of the circuit models.

New Capabilites in Multiport Measurements: Improving Speed and Accuracy Webcast
Tuesday September 26, 2006 10am PT/1pm ET
Sponsored by Agilent Technologies
Component integration continues to increase and the movement toward differential technologies increases the need for multiport measurement solutions. Early test solutions involved the integration of a network analyzer with a switching network. While this provided single connection capability, there were often tradeoffs in accuracy or performance. This webcast will detail the newest advances in multiport measurement capability using the PNA network analyzer.

Keep Current! Learn more about High Power Connectors and Connection Systems
Tuesday September 26, 2006 9am PT/Noon ET
Sponsored by TTI
Once again TTI sponsors another installment of its popular Technical Seminar Series, "Be Smart - Choose the Right Part." Today's leading edge electronics applications require more power to be packaged in higher densities and with less available space. Designers have greater concern over temperature rise, signal interference, and cost effectiveness. So join Amphenol, FCI, and Molex as they discuss their latest technologies in high power connector solutions and mixed power and signal connectors.

Lower System Cost with Spartan-3 Based PCI Express Solutions
Tuesday September 26, 2006 11am PT / 2pm ET
Sponsored by Xilinx
The scalability of PCI Express technology while preserving existing investments in software infrastructure make it an ideal choice for a variety of applications such as mobile, desktop, server and communication devices. Join us in this webcast as we walk you through the PCI Express architecture, Xilinx comprehensive portfolio of PCI Express solutions for the highly cost-sensitive Spartan™-3 based applications, and the development resources that help reach market sooner.

Easing The Upcoming Conversion To Multi-core For x86-Based Embedded Software
Wednesday, September 27, 2006 11 am PT / 2 pm ET
Sponsored by Teja Technologies
Teja will present a methodology for extracting maximum performance out of embedded multi-core x86-based applications.in a manner that will save multiple person-years of effort.

Options and Solutions for RF System Design
Wednesday September 27 12 Noon ET/9:00am PT
Sponsored by Analog Devices, Inc. and Avnet
RF system designers face some of the toughest challenges in engineering, and this seminar will explore the options and tradeoffs involved in designing the RF signal chain. Discussion includes important advances and issues with modulators/demodulators, ISM transceivers, mixers and multipliers, log amps, detectors and gain blocks, and more. Products and technology will be highlighted that ease the RF design task and significantly improve system performance.

Logic Analyzer Basics
Wednesday September 27 1pm ET/10am PT
Sponsored by Agilent Technologies
This seminar will cover the fundamentals of Logic Analyzers, from key questions like "when would I use a Logic Analyzer" to "what is a timing/state analyzer and how does it work". The seminar will also cover areas like probing and cross correlation between Oscilloscopes and Logic Analyzers. Engineers who are new to Logic Analyzers, or engineers who may just want a refresher, will find this seminar extremely beneficial.

Testing Mobile WiMAX Radios from Pre-Certification Through Manufacturing
Thursday September 28 1:00pm ET/10:00am PT
Sponsored by Agilent Technologies
This webcast reviews the radio tests that can be tackled using a standard Vector Signal Analyzer and Generator. It will provide insight into the test objectives and configuration needed to evaluate devices during design validation, integration and initial manufacturing.

7:1 LVDS Video Interface Design with Low-Cost FPGA
Thursday September 28 9 am PT / 12 noon ET
Sponsored by Lattice Semiconductor
This webcast focuses on a reference design for an LVDS video interface and the benefits of designing video interfaces with the LatticeECP2 low-cost, 90nm FPGA family. Attend this webcast and learn about:
* Review of digital video applications
* How LatticeECP2 FPGA I/O features support 7:1 LVDS and Camera Link interfaces
* Detailed discussion of the LVDS Tx and Rx reference design implementation

UART and Bridge solutions for I2C, SPI, Asynchronous (UART) interface and applications
Thursday September 28 (Click above link for times)
Sponsored by Philips
This netseminar will introduce you to the features of the highest speed UARTs up to 5Mbit/s and low voltage down to 1.8V, including advanced features available in IMPACT Products: Intel and Motorola Bus Interface, 1- to 8-Channel, with the deepest FIFO up to 256bytes. Learn about the industry's first I2C/SPI to UART bridge chip, SPI or UART to I2C Bus Controller and I2C to SPI bus controller, part of a new family of low-power bridge ICs that will simplify the design of connected devices. NXP Semiconductors (founded by Philips) will explain how this new SC16IS7xx, SC18IS6xx and SC18IM700 family of bridge ICs provides designers with a compact, seamless bridge across the most widely used protocols including UART, I2C, and SPI. The seminar will include a serial protocol overview, including introductions to SPI, I2C and UART. Understand how these bridge ICs reduce the time, resources, and board space required to connect multiple devices for complex applications.

August 2006

Learn the Latest Bug Finding Techniques
Wednesday, August 2, 2006
Sponsored by Coverity
This net seminar, with Ben Chelf, CTO of Coverity, discusses how to find critical defects and security vulnerabilities in your code with the latest source code analysis technologies. The 60 minute webcast will feature an extended Q&A period. Learn how engineering can spend less time debugging and more time developing new functionality.

Optimizing High-Speed Serial Design Net Seminar Series
Dates: Aug 9, Aug 16 Click above link for details
Sponsored by Altera
Series Overview
Attend this net seminar series to learn how FPGAs with embedded transceivers are the ideal solution to the growing number of applications using high-speed serial-based protocols. Learn how a complete solution, combined with good design practices and first class EDA tools, can help reduce the complexity and risk.

A Fresh Approach to Switching Regulator Topologies and Implementations
Wed, Aug 09, 2006 11:00 AM EST
Sponsored by Fairchild Semiconductor
There are several alternatives to the widely used hard switched flyback topology which still has its place in many applications. This presentation identifies areas where new approaches provide performance and total system cost advantages.

Maximizing Data Rates through PCB Structures by Understanding Dielectric Properties
August 15, 2006 10am PST, 1pm EST
Sponsored by Agilent Technologies
This web seminar will discuss a highly accurate test methodology using a vector network analyzer with split post dielectric resonator to pinpoint dielectric properties of PCB materials and why this important to optimize signal integrity. Achieving the highest data rate with the lowest cost substrate may not be as difficult as you think.

10G Transport and the SONET/SDH to Ethernet Migration
August 15, 2006 11 am PT / 2 pm ET
Sponsored by AMCC
Several factors are influencing carriers to migrate from traditional TDM based wide area networks to Ethernet based wide area networks. No more is this evident than in the 10G Transport space. This Net Seminar will overview the factors causing this migration and how it will impact next generation WAN communication systems.

Practical Power Application Issues for High Power Systems
Wed, Aug 16, 2006 12:00 PM EST
Sponsored by Fairchild Semiconductor
Choosing the right products for high power systems is a critical challenge. This presentation will introduce new products for the system design of a power supply and frequency inverters that offer better reliability, higher efficiency and a reduction of board space.

How to Build a High-Speed Enterprise Security Gateway in Record Time
Wed, Aug 16, 2006 11 am PT / 2 pm ET
Sponsored by AMCC and SafeNet
IT organizations demand enterprise security gateways that deliver advanced levels of performance and network protection to support faster networks, increasing security requirements, and new real-time applications such as VOIP. Join AMCC and SafeNet on August 16 at 2:00 PM (EST) / 11:00 AM (PST) for a step-by-step tutorial on how to integrate the AMCC 440GRx PowerPC processor and SafeNet's QuickSec security toolkit into a complete high-performance / low-cost enterprise security gateway - in record time.

Practical Power Application Issues for Switch-Mode Power Supplies
Wed, Aug 23, 2006 11:00 AM EST
Sponsored by Fairchild Semiconductor
Building on the theoretical underpinnings of our previous seminars, we will cover the following topics related to recent customer experience: EMI Reduction Techniques for Power Supplies: layout, input filter resonance, measuring common mode and differential mode noise separately, comparison of SEPIC and buck converters Stability of synchronous buck converters: how to design the compensation network

Options and Solutions for Sensor Signal Conditioning
Wed, Aug 23, 2006 12 Noon ET/9:00am PT
Sponsored by Analog Devices, Inc. and Arrow Electronics
Optimum signal conditioning is a critical design element in a sensor implementation. As signal conditioning components have steadily advanced in performance and levels of feature and functionality integration, designers will benefit by reviewing their options and design approaches in light of the latest technology. This NetSeminar will examine signal conditioning options at the system level and the circuit level, as well as focus on the key component specifications and features needed to maximize performance and flexibility, and reduce cost and time to market in sensor implementations.

Meeting the Challenges of High Speed Signal Integrity Design
August 23rd, 2006 1pm EST
Sponsored by Agilent Technologies
This seminar will be valuable to engineers and designers in a number of industries where the latest high-speed digital communications technologies such as Infiniband, S-ATA, USB 2.0, PCI Express, FibreChannel, RapidIO, and HyperTransport are being implemented. Also those engineers in other disciplines who are seeking to understand issues relating to high speed digital and analog design in the communication industry.

WiMedia UWB PHY Simulation and Test
August 24th, 2006 10am PST, 1pm EST
Sponsored by Agilent Technologies
New wireless networking standards commonly present design challenges at the physical layer, which in turn present circuit simulation and testing challenges. The WiMedia MB-OFDM UWB signal with its low power, hopped, 528 MHz wide OFDM format is a current example which will have broad impact as the base technology for Certified Wireless USB and next generation Bluetooth. This seminar will review WiMedia's MB-OFDM PHY layer structure and discuss various MB-OFDM testing topics, including transmitter analysis, receiver stimulation and evaluation, and using simulations during circuit design to improve device immunity to interference.

Designing Digital Video Systems Leveraging DaVinci™ Technology
August 30th, 2006 8 am PT / 11 am ET
Sponsored by Texas Instruments
Register today and learn how to simplify digital video system design by leveraging DaVinci™ technology. Texas Instruments DaVinci™ technology offers unprecedented video integration for applications such as videophones, streaming media devices, automotive infotainment, digital still camera's, IP set-top boxes, video security systems and digital video products that have yet to be invented. With DaVinci™ Technology, TI has reduced the complexity of integrating digital video, making it as easy to implement.

No More Code!
Visual Embedded Design With PSoC Express™
Thursday, August 31, 2006 9:00am PT/Noon ET
Sponsored by Cypress Semiconductor
A custom microcontroller solution to a design problem is always a superior fit than an off-the-shelf device, but it takes more precious time to develop a reliable, custom design. The right design tool, however, can level the playing field by eliminating the need for specialized skills like programming languages and software design methods. And if the tool allows easy porting of designs from one device to another as requirements change, the risks of early development time being wasted decrease substantially. PSoC Express is a visual Embedded Design tool that enables anyone to create a custom programmable solution by eliminating the need for specific programming or target device experience.

July 2006

Discover MEMS Resonators, Discover SiTime
Tuesday July 18, 2006 1:00pm ET/10:00am PT
Sponsored by SiTime
This seminar is an introduction into the basics of frequency generation specifically applied to MEMS oscillators including: frequency error, thermal effects on frequency generation, jitter, phase noise, component reliability, PLL start up issues, and much more. It's about time to discover how MEMS resonators will work in your applications.

Adding Triple-Play Test Capability Using FPGAs
Wed July 19, 2006 12 Noon ET/9am PT
Sponsored Altera
This netseminar describes the overall market and architectural trends for triple-play services and how testing OEM equipment capabilities is affected by the ever changing development and deployment requirements carriers face.

Converters in Motion: A/D Converter Considerations for Motor Control
Wed July 19, 2006 12 Noon ET/9am PT
Sponsored Analog Devices, Inc
This seminar examines a typical motor-control circuit configuration for ac servos and variable frequency drives. A/D converter requirements are broken down into voltage and current sensing, shaft encoder feedback, and velocity inputs. Sensor characteristics, which determine the most appropriate A/D converter selection and circuit configuration within motor control applications, will be discussed.

STMicroelectronics' Solution for Energy Metering
Thursday July 20, 9am PT/12Noon ET
Sponsored By STMicroelectronics
Designing an IEC/ANSI-compliant electronic power meter or adding embedded electronic power metering capabilities to consumer appliances, electrical switchgear/protection equipment or industrial lighting need not be a complicated, expensive or lengthy project. Please join STMicroelectronics for an informative, free Solutions for Energy Metering web seminar on July 20, 2006 to learn just how easy it can be and get the latest news on innovative ASSP devices and reference design platforms.

System Verilog for e Experts: Understanding the Migration Proces
Thursday July 20, 9am PT/12Noon ET
Sponsored By Synopsys
This seminar compares the e and SystemVerilog languages from a technical perspective, and describes how e-based environments can easily and efficiently be implemented in SystemVerilog. e and SystemVerilog have much in common, but despite having so much in common, these two languages differ significantly in certain critical areas. The two languages have major differences that may require the user to take a slightly different approach to testbench coding. The presentation will identify and explain these differences and describe how functionality similar to e can be obtained using SystemVerilog.

Design for Performance with Virtex™-5 FPGAs
Tuesday July 25, 2006, 2pm ET/11am PT
Sponsored by Xilinx
Virtex™-5 Platform FPGAs embody true innovation at every level, from the 65nm process and its unique ExpressFabric™" to the latest software tools that take full advantage of it. In this webcast you will learn how Virtex-5 FPGAs achieve 30% higher performance than previous generation devices, guidelines and insight to help you design for maximum performance, and advanced techniques and tool settings to maximize performance.

10 ns Pulsed IV Characterization of SOI and High-k Transistors
Tuesday July 25, 2006 10am PST, 1pm EST
Sponsored by Agilent Technologies
Advances in semiconductor manufacturing require new measurements to characterize SOI devices. Self heating during measurement results in error. Agilent has improved the fast pulse method, resulting in accurate device evaluation. The Pulsed IV solution can be used on the lab bench or in production test for 10ns pulses to a device, resulting in accurate Id-Vg and Id-Vd measurements.

Understanding modern power MOSFETs
Wed, July 26, 2006 11:00 AM EST
Sponsored by Fairchild Semiconductor
Driven by new energy efficiency regulations, system designers are increasingly adopting synchronous buck controllers and half-bridge structures. This presents them with the new challenge of designing with power MOSFETs. This presentation provides a basic understanding of MOSFETs with more detailed explanation of synchronous buck and half-bridge structures.

Overview of 1xEV-DO Release A Webcast
Thursday July 27, 2006 10am PST, 1pm EST
Sponsored by Agilent Technologies
Join Agilent on July 27, 2006 to learn about whatýs new with 1xEV-DO Release A. Rel A is the latest version of 1xEV-DO and offers more functionality and improved data rates. Hear about the new capabilities Rel A offers and the operating principles of the new physical layer.

Design and Develop Innovative and Robust Touch Sensor Interfaces Using Capacitive-to-Digital Converters
Thursday July 27, 2006 12 Noon ET/9am PT
Sponsored by Analog Devices, Inc
Capacitive-to-digital converters (CDCs), implemented as touch controllers, enable designers to create innovative and functionally efficient touch interfaces while offering unique ergonomic designs that increase the levels of end-product differentiation. Recent CDC solutions also contain environmental compensation circuitry to account for changes in ambient operating conditions which enhances the reliability of the application. This seminar will focus on the design and development of CDC-based touch sensors and their application, cite CDC product examples such as the AD7142, and explore development tools provided by ADI.

Overview of 1xEV-DO Release A Webcast
Thursday July 27, 2006, 1:00 pm EST
Sponsored by Agilent Technologies
Since the release of the 1xEV-DO Release 0, the cdma2000 High-Rate Packet-Data air interface system has steadily gained market share and is now driving the wireless industry in terms of data rate and efficiency for packet data applications. A new version of 1xEV-DO, known as Release A, is now under full development. This updated version offers more functionality and improved data rates, especially in the reverse link. A new reverse link design offers peak data rates of up to 1.8 Mbps. This presentation provides an overview of the new capabilities offered in Release A along with the operating principles of the new physical layer.

June 2006

New Debug Techniques for FPGA and Embedded Processing Based Design
Wednesday, June 7, 2006 2:00 pm ET/11:00 am PT
Sponsored by Xilinx and Agilent Technologies
Visibility of microprocessor execution in the context of the surrounding system is a critical element of an effective debug strategy for systems implemented with embedded processors. New advances in FPGA-based embedded processor measurement cores and associated measurement tools from Xilinx and Agilent have eliminated the traditional limitations incurred with buried cache and pipelining offering good visibility behind caches while using a minimum number of FPGA pins. Explore techniques in this joint Xilinx/Agilent web cast on how to debug and validate FPGA designs, including those that implement PowerPC hard processor and/or Xilinx MicroBlaze soft processors.

Introduction to the Xilinx Spartan-3E Starter Kit
Tuesday June 13, 2006 2:00 pm ET/11:00 am PT
Sponsored by Xilinx
The SpartanTM-3E FPGA Starter Kit is a complete development board solution giving designers instant access to the capabilities of the Spartan-3E family. This session will cover the major features, components and usages of the kit.

Preventing Battery System Failures in your Portable Products
Tuesday June 13, 2006 11:00 am PT/2:00 am ET
Sponsored by Micro Power Electronics, Inc.
Is your battery system safely powering your portable device? Catastrophic safety issues with battery systems -ranging from under-performance to explosions - have heightened safety concerns. This NetSeminar examines the most common causes for dangerous failures in battery systems, and provides design guidelines and techniques for portable device manufacturers which will circumvent hazardous malfunctions in portable products.

Electronics Supply & Manufacturing Editorial NetSeminar: The New Competitive Weapon: Relentless Innovation
Wednesday, June 14, 2006 9:00 am PT/Noon ET
Sponsored by IBM
How do companies ensure that the pipeline of new products and services will continue to drive revenue growth? The answer is complex and involves new thinking on the part of business and engineering management. It involves collaboration with a new set of partners including IP providers, independent design houses, original design manufacturers, and systems companies. It also requires rethinking internal innovations such as logistics and business processes plus new relationships with customers and suppliers. Join our panel of experts as they present the latest thinking on how to tap new sources of relentless innovation to drive growth. Hear case studies of best practices and learn how to apply these principles to your own business.

EE Times Editorial NetSeminar: The Value of Model-Based Design
Thursday, June 15, 2006 11:00am PT/2:00pm ET
Sponsored by The MathWorks
Model-based design is a new approach that's rapidly gaining adherents in the world of electronic design. This NetSeminar will seek to define model-based design, and establish its relationship to other electronic system-level (ESL) design methodologies and to hardware and embedded software implementation tools. Participants will discuss the benefits and challenges of model-based design, explore current practices, and suggest needed improvements in the current system-level design flow.

Advanced Design Techniques for FPGAs Seminar
Tues. June 20, 2006 11:00 am ET/8:00 am PT
Sponsored by Mentor Graphics and Altera
This seminar will discuss the latest ModelSim design features and Altera devices to take you to the next level in FPGA design. Learn how to apply advanced design techniques for creating, debugging & simulating your next design. Whether you're tackling thousands or millions of gates, you'll approach design from a whole new perspective.

Keeping Your Cool When Measuring Temperature
Wednesday, June 21, 2006 9:00 AM PT / 11:00 AM CT /12:00 PM ET
Co-sponsored by Analog Devices, Inc. and Avnet Electronics Marketing
One of the most frequently undertaken measurements is that of temperature. There are a multitude of different temperature sensors employed, each with their own unique requirements for interface and linearization. System designers need to analyze trade-offs between using different signal conditioning and linearization techniques. This seminar will provide details on the various sensors commonly employed, and circuit and system topology's, implementations, and trade-offs to consider to achieve the best combination of accuracy repeatability, linearity and cost.

Power Saving Technologies in the World's First 65nm FPGA
Tuesday June 27, 2006 2pm ET/11am PT
Sponsored by Xilinx
Reducing power consumption lowers system cost, increases reliability, and enables higher clock rates. Learn about power-saving technologies and architectural innovations that enable Virtex?-5 FPGAs to achieve 30% higher performance with 35% lower dynamic power consumption than previous-generation devices. We present benchmark data and tools for estimating and optimizing FPGA power.

The Bottom Line: Evaluating the Quality of Embedded Operating Systems
Tuesday June 27, 2006 1:00 PM EST, 10:00 AM PT
Sponsored by QNX
There is considerable evidence that modular system design and "componentization" results in higher quality software. A modular design has low coupling among its components and high cohesion within its components. This is the case because modular designs are less complex, contain less code and are cognitively simpler for designers and programmers to understand and modify. In addition to having performance and extensibility advantages, using a modular or microkernel architecture makes the OS more reliable and more secure. Microkernel architecture offers two core mechanisms that set it apart from other architecture choices to provide a solid foundation for reliability, performance, shortened development cycles, and increased scalability, ultimately leading to lower development and production costs.

Building a Bridge to PCI Express: A Case Study using AXI
Wednesday June 28, 2006 9:00am PT/ 12:00pm ET
Sponsored by Synopsys
Using DesignWare IP to add a PCI Express® interface to your system-on-chip (SoC) design makes your design task considerably easier. However, if you are using a standards-based on-chip bus in your SoC, you will have to design a bridge to PCI Express from your bus. In this case study, we will walk you through the process of building a bridge from PCI Express to the industry-standard AMBA® 3 AXI™ on-chip bus.

Carrier Grade Linux and COTS:
How Telecom Companies Can Win with Commercial-Grade Solutions
Wednesday June 28, 2006 8:00 am PT/11:00 am ET
Sponsored by Wind River Systems
Efforts to standardize software and hardware solutions for telecom devices are fast approaching an inflection point for rapid adoption. The latest specifications for Carrier Grade Linux (CGL) offer a powerful combination of high availability, performance, security, reliability, and hardware optimization. But creating a CGL distribution is no easy task, even for the most seasoned team of Linux gurus. There are numerous packages and potential kernel modifications that must be integrated, tested, and validated, each with their own set of dependencies. Any hiccup in the development cycle can severely impact time-to-market and eliminate the benefits of using a standard solution. This webinar will provide an overview of the hottest trends in the telecom device market. It will identify the advantages of using standard off-the-shelf solutions, and will also explore some of the challenges and potential obstacles of rolling your own.

RF Back to Basics: Signal Generation
Wednesday June 28, 2006 8:00 am 1pm ET/10am PT
Sponsored by Agilent Technologies
To prepare you for the challenges of today's test signal generation and signal simulation, this presentation will review the basic characteristics of signals required to test a variety of products, from amplifiers to digital communication systems and advanced radar systems. These signals may vary from simple single frequency sinusoids, to analog and digitally modulated carriers, to modulated carriers that simulate interference or impairments. This presentation addresses the basics of signal generation, key signal specifications, and applications of test signals. It also shows how signal generators are taken beyond general purpose applications to simulating advanced signals with impairments, interference, signal capture, and waveform correction.

Network Processor Applications in 3G Mobile Infrastructure
Thursday June 29, 2006 Noon ET/9am PT
Sponsored by AMCC
With increasing data rates of next generation 3G mobile infrastructure, the concept of network processors is finding new interest with equipment vendors. This netseminar will overview the likely target systems for network processors in mobile and introduce AMCC's new nP3665 OC-24/2G NPU, designed specifically for the requirements of mobile.

Secure Embedded Operating Systems 101: A primer for security-relevant products
Thursday June 29, 2006 1:00 PM EST, 10:00 AM PT
Sponsored by QNX
Attacks, hacks, worms, viruses - software is becoming increasingly vulnerable to a myriad of threats. No matter how secure the perimeter around your systems, malicious attacks can and will break through. How do you ensure containment, if not continued operation, despite a system breach? Today's interconnected embedded systems require that secure operation be designed in from the ground up - via a secure OS.

Designing FPGA-based PCI Express x1/x4/x8 Solutions
Thursday June 29, 2006 2:00 PM EST, 11:00 AM PT
Sponsored by Lattice Semiconductor
Are you interested in using PCI Express with new-generation high-end FPGAs? Want to get the most performance for your design but fighting a tight deadline? This seminar will present a complete high-performance PCI Express solution available from Lattice Semiconductor and Northwest Logic. This solution includes new PCI Express x1, x4 and x8 cores, embedded PHY layer functionality in the exclusive LatticeSC Physical Coding Sublayer (PCS), reliable 2.5 Gbps SERDES performance, and easy-to-use design tools to put it all together. Lattice and Northwest Logic deliver everything you need to get up and running with PCI Express quickly.

May 2006

Analog eLab: Power Concerns for LEDs Used for Display Lighting
Wednesday, May 10, 2006 9:00am PT/Noon ET
Presented by Texas Instruments and Arrow Electronics
Driver concerns for LEDs used in general display lighting continue to change rapidly. Because of increased of efficacy (Lumens/Watt), LED use for lighting continues to move forward. LED lighting has its own vocabulary and set of issues that need to be understood by the design engineer. Starting with the important features of general display lighting, the current methods and practices employed to provide power are examined. LED manufacturers also assist with suggestions for improved light quality. A full study can be made of control techniques for various types and topologies of lighting systems with the advantages and disadvantages of various solutions highlighted.

Electronics Supply & Manufacturing NetSeminar from EDS
Charting the course ahead: boosting performance in an increasingly complex world
May 10, 2006 11:00 am PT/2:00 pm ET
Sponsored by Avnet Electronics Marketing
As business relationships grow more complex and global, new challenges emerge. How are today's leading electronics companies facing up to the challenges? Listen to this senior executive panel from EDS, as they discuss how they are addressing the challenges and strategies for improving efficiencies and building value across their extended supply chains. Topics to be discussed include:
*Where will short-term and long-term growth come from and how should companies position themselves today?
*In this era of outsource-everything, how can you improve the supply chain efficiencies inside your company and with your network of partners?
*What role will China and India- as well as emerging countries like Vietnam - play in global business plans?
*How do savvy companies convert design activity into volume production - and how do they keep track of their design wins?

Electronics Supply & Manufacturing Editorial NetSeminar:
How to turbo-charge your distributed manufacturing network
Thursday, May 11, 2006 11 am PT/2:00 pm ET
Sponsored by SAP
One of the most important sources of competitive advantage is a company's ability to optimize the operation of a complex global network of in-house and outsourced manufacturing facilities. Unfortunately, most companies in the electronics industry today are failing to do so for three key reasons:
*Lack of visibility of mission critical supply chain data coupled with a need for detailed plant-level information across the distributed network.
*Lack of control and oversight of global operations, especially when the manufacturing plant is run by a EMS or ODM.
*Lack of flexibility in managing forecasts and demand signals across the distributed network.

Join the panel as they present and discuss real-world examples of companies that are optimizing their distributed manufacturing networks and learn how you can apply these strategies, tactics and tools to your own operations.

Automotive DesignLine NetSeminar:Power Management, Key to Auto Electronics Efficiency
Wednesday, May 17, 2006 9:00am PT/Noon ET
Sponsored by Analog Devices, Freescale Semiconductor and Philips Semiconductors
This NetSeminar will address some of the issues and trends involving automotive electronics power management. With ever increasing electronics features in today's cars, husbanding electric power resources is vital to ensure each electrical component has adequate power to function, prolong battery life, and improve fuel economy and driver security systems. The prospects of by-wire control, such as braking and steering, along with current throttle controls, offer fewer components for lighter weight (for fuel economy) and basic energy efficiency by only using power when needed?as opposed to constantly running a hydraulic power steering pump, for instance. However, such features place even greater demands on the electrical supply and control systems.

Introducing Virtex-5 FPGA - The Ultimate System Integration Platform
Wednesday, May 24, 2006 2:00 pm ET/11:00 am PT
Sponsored by Xilinx
This session will acquaint architects and designers with the some of the changes in the Virtex-5 LX FPGA to better equip them in their endeavor to access the improved capacity and performance it provides. Learn how you can meet higher performance and lower power design requirements, and how to better integrate system functions with the latest FPGAs.

Cypress HID Solution - Savings from Concept to Production
Wednesday, May 24, 2006 9:00am PT/Noon ET
Sponsored by: Cypress
The highly competitive nature of the human interface device market necessitates tight control over costs at every stage of product development, from conception to mass production. This seminar will detail how Cypress?s products for human interface devices are designed to minimize design cycles, reduce bill of material costs, and ease transfer into manufacturing, speeding time to market and adding more money to the bottom line.

Analog Filtering and Buffering for Video Applications
Thursday, May 25, 2006 12:00 pm ET/9:00 am PT
Sponsored by: Analog Devices, Inc.
The interface between video components is becoming increasingly more difficult due to the faster frequency response that is required for high definition (HD) video, and the lower power requirements desired in portable applications. This on-line seminar will provide a general overview of analog video, demonstrate the need for video filtering, and provide various ways of implementing standard ADI products to achieve the best picture quality using the lowest possible power. The techniques demonstrated in this seminar will save design time, increase reliability, and lower cost--essential attributes for a video end-system's success in the market.

April 2006

Analog eLab: Optimizing Power in Low-Power Wireless Systems
April 12, 2006 9:00am PT/Noon ET
Sponsored by Texas Instruments and Avnet
Most applications for low-power wireless products are in some way power-constrained. This session will cover issues related to power consumption, including systems design, selection of power sources and protocol design. Also important to low-power systems are the trade-offs between component cost, component count and battery life, which will be discussed. This lab session will take a closer look at how to practically measure power consumption in a polling system and how to perform accurate estimation of battery life time. We will measure the changing power consumption of a wireless mouse and use this as a basis for discussion for estimating the power consumption of a complex system (incorporating different power modes), etc.

The Device Software Tipping Point: When is it time to adopt new OS technology?
April 13, 2006 8:00am PT/11:00am ET
Sponsored by WindRiver
Is your device software vendor on the ropes? Does your number one competitor own your device software roadmap? Is your device software so old that your original engineers are retired in Florida? Is your team still using printf to debug code? If any of these sounds familiar it may be time to migrate to new technology. But how do you know for sure? Is there a best practices decision framework to make an informed, carefully-considered decision on whether and when to migrate to a new operating system and development environment? (Hint: Yes.) When should I consider migrating? What factors should go into a migration decision? How do I weigh the risks vs. benefits?

TTI Technical Seminar Series: Be Smart--Choose the Right Part Increasing in Frequency - RF in New Designs
April 19, 2006 9:00am PT/Noon ET
Sponsored by TTI, Inc.
As the need increases for passive components to be smaller, faster, more reliable and robust, the need to learn more about these components also increases. Register for this TTI-sponsored Technical Seminar and learn more about RF components as AVX talks about RF capacitors, Murata discusses SAW filters and Spectrum Control addresses the specialty filter product area.

Design in the AMCC PPC405EZ Networked Industrial Processor
April 25th, 2006 10:00 am PT/1:00 pm ET
Sponsored by AMCC
Join us to find out what new market AMCC is serving with the latest in its PowerPC-based SoC line-up. Hear details about a unique networked industrial processor that brings precision networking and control to industrial automation & embedded applications. You may come away re-thinking use of traditional networking, memories and microcontrollers in your application.

Reduce cost and risk and gain time-to-market with Innovative Structured ASIC
Sponsored by eASIC
This Net seminar will discuss how eASIC's Structured ASIC devices can help you reduce cost and risk while achieving your design turnaround objective and performance requirements. These Structured ASICs are based on an innovative fabric which couples programmable, FPGA-like SRAM/LUT based logic cells with hard, ASIC-like customized interconnect. With just one Via layer to customize, maskless lithography is employed, enabling Structured ASIC devices with No-NRE and no Minimum Order Requirements.

Designing Transformer Coupled Front-Ends for High Performance A/D Converters
Wednesday, April 26, 2006 12:00 pm ET/9:00 am PT
Sponsored By Analog Devices, Inc.
The input configuration, or "front-end", of a high-performance ADC application, is a critical piece of how the converter receives the signal information to be sampled. For the optimum transformer-coupled front-end design, factors such as ADC architecture, e.g., buffered and switched-capacitor pipeline architectures, and the specifications of the particular transformer selected come into play. A sub-optimal front-end design can have adverse effects on the performance delivered by the ADC in the application. This seminar will provide a practical "formula" approach for designing transformer-coupled front-ends for high performance ADC in baseband and super-Nyquist applications.

Molex Microminiature Webinar
Wednesday, April 26, 2006 Noon ET/9:00 am PT
Sponsored By Molex
Register for our webinar and get an inside look at our reliable Microminiature interconnects, ideal for applications ranging from portable audio and video to notebook PCs and cellular phones. This webinar will highlight how our sub 1.00mm pitch products can help save space with uncompromising reliability and performance. At the conclusion of the presentation, our experts, Dave Rios and Akihiro "Aki" Tezuka, will take your questions and answer them LIVE.

March 2006

EE Times Editorial NetSeminar Series: Zen of Disruption - Lessons from Leaders
New Media, New Directions
March 8, 2006; 10 a.m. PT/2 p.m. ET
Sponsored by: ADI and STMicroelectronics
The panel will explore the challenges and opportunities arising from the growing diversity of digital media sources. How do we measure what people actually use? What kinds of new gadgets may emerge rapidly or never get off the ground? What are some of the issues around content security? What role will technologies like watermarking play?

Analog eLab: Managing Noise and Ground in Precision Analog System Applications
Wednesday, March 8, 2006 11:00 am CST/Noon EST
Presented by Texas Instruments and Arrow Electronics
Sensor applications often have low-level signals. A peaceful co-existence of the sensor signal, analog circuitry, and processor requires careful attention to layout and noise reduction techniques.
In this eLab we will discuss three sources of noise, the paths where the noise travels, and how to reduce the noise to tolerable levels. We will discuss the proper selection and placement of noise isolating and limiting components to keep analog and digital noise out of sensitive input circuits. This eLab is recommended for any designer who has struggled to keep noise out of sensitive input circuits.

Improved Measurement Techniques for 100-600 MHz Oscilloscopes
Thursday, March 9, 2006 11:00am PT / 2:00pm ET/ 19:00 GMT
Sponsored by LeCroy
A technical net seminar that provides both basic and advanced information to enable more effective use of digital oscilloscopes. Topics are targeted to users of 100-600 MHz oscilloscopes, though much of the advice can also be applied to other bandwidths. Design engineers are encouraged to attend.

Wireless Net DesignLine Editorial Net Seminar
Making a Case for Wireless UWB
March 9, 2006 1 pm PT/3 pm CT/4 pm ET
Sponsored by Cadence Design Systems, Freescale Semiconductor and Philips Semiconductors
Where is UWB headed? Neither the UWB Forum nor the WiMedia Alliance have been unable to muster the votes to push their technology into the next step of the IEEE standard-making process. As a result, the IEEE's UWB subgroup has disbanded and the time has come to "let the market decide."
Both groups are intent on being market leader. But which technology do you think has the upper hand? Join Jack Shandle, site editor of Wireless Net DesignLine as he discusses the pros and cons of each technology and key design challenges with Freescale Semiconductor, a member of the UWB Forum, and Philips Semiconductors, a member of the WiMedia Alliance.
Cadence Design Systems, which is technology neutral in the standards debate, will focus its presentation on the challenges of designing UWB in this era of uncertainty. Join our panel and ask the experts your questions.

Enabling the Next Generation of Medical Instrumentation
Wednesday, March 22, 2006 Noon ET/9:00 am PT
Presented by Analog Devices, Inc.
Today's and tomorrow's medical instruments are marvels of technology, automating some of the most complex and difficult scientific studies, and bringing them to accurate, repeatable and portable devices. This fast paced seminar will examine a multiplicity of issues involved in providing the variety of precise measurements and stimuli needed to accurately diagnose health and disease. Totally new, as well as traditional, classes of components will be discussed, and their implementation shown in both existing and new applications and instruments. Examples will include AED's, blood/cell analysis and cytometry, impedance spectrometry, ultrasound and more.

February 2006

On the Shoulders of Eclipse: Advancing Embedded Development with Add-on Tools
Wednesday, February 8, 2006 11:00am PT / 2:00pm ET/ 19:00 GMT
Sponsored by QNX Software Systems
Instead of competing with Eclipse, proprietary IDE suppliers embrace it. They add value through the unique features and functions they build into their products and retain users through familiarity, convenience, and ease-of-use. But how do various Eclipse implementers differentiate their offerings around that Eclipse-based IDE? Moreover, how do these offerings measure up against unique needs of embedded developers? Join this one-hour free web seminar by QNX and learn how to extend the base Eclipse IDE with the industry's richest Eclipse-based tool suite customized specifically for embedded development.

TTI's Technical Seminar Series: Bonus Marketing Edition
Be Smart - Choose the Right Part
Passive Market Outlook
Tuesday, February 14, 2006 9:00 am PT/11:00 am CT/Noon ET
Sponsored by TTI, Inc.
Listen in as passive industry expert, Dennis Zogbi provides a detailed market overview of the passives industry. Additionally, a panel of manufacturers will offer specialized market information on various products. KEMET will discuss the capacitor segment, Littelfuse will focus on circuit protection, Murata will examine the advanced ceramics sector, and Vishay will analyze resistors.

Plated-plastics: Maximize design flexibility, minimize interconnect cost
Wednesday, February 15, 2006 9:00 am PT/ Noon ET
Sponsored by Molex
When the world of electronic interconnect devices is broken down to its basic elements, metal and plastic are by far the most relied upon materials. Now, Molex is ushering in the next generation of interconnect technology by combining these two elements to form metal-plastics. Discover more about plated-plastics and how this electrically characterized technology can improve system performance with low cost solutions.

Designing Stable Systems Using Amplifiers
Tuesday, February 21, 2006, 12:00 pm ET/9:00 am PT
Sponsored by Analog Devices Inc.
"How do I achieve amplifier stability?" is one of the questions most frequently asked of op amp application engineers. What contributes to amplifier stability and how can you determine just how stable your circuit is? This seminar will clearly explain amplifier and control theory terms and definitions, show a simple but effective method for observing stability, and discuss three techniques for immediately improving amplifier and system stability. Join us and avoid the time and expense of amplifier board troubleshooting and re-design.

Designing and Optimizing Software for Intel® Architecture Multi-core Processors
Wednesday, February 22, 2006 11:00am PT / 2:00pm ET/ 19:00 GMT
Sponsored by QNX Software Systems & Intel
Please join us for our web seminar - Designing and Optimizing Software for Intel's New Multi-core Processors on Feb.22 at 2PM EST. Technical experts D. Robert Craig from QNX and John Beaton from Intel will review proven strategies and techniques necessary to successfully migrate and optimize applications to realize the benefits of these next generation processors.

TTI's Technical Seminar Series: Bonus Marketing Edition
Be Smart - Choose the Right Part
Connector Market Outlook
February 23, 2006, 9:00 am PT/11:00 am CT/Noon ET
Sponsored by TTI, Inc.
Tune in as connector industry expert, Ronald E. Bishop offers a comprehensive market overview of the connector industry. Additionally, a panel of manufacturers will offer their insight on the market outlook and various user end applications. 3M will talk about the following applications: medical, communications/networking, and machine vision. Amphenol will discuss the military and aerospace sector. And Phoenix Contact will delve into the industrial and industrial automation areas.

Low-Power Techniques to Minimize Your Performance Tradeoffs
February 23, 2006, 11:00am PT / 2:00pm ET/ 19:00 GMT
Sponsored by Virage Logic, MIPS Technologies & MAGMA
At 90 nm and below, it is critical to minimize dynamic power consumption and leakage while ensuring uniform power distribution. Addressing power issues throughout the flow can greatly increase design productivity and help SoC designers meet performance goals. Designers who utilize an integrated, power-aware RTL-to-GDSII design flow complete with physical-design IP can significantly accelerate silicon success.

Analog eLab: Optimizing Analog-to-Digital Conversion in DSP-based Applications
Tuesday, February 28, 2006 12:00 pm CST/10 am PT
Presented by Texas Instruments
Any system that touches the "real world" will need some form of data conversion. Many DSPs have integrated data converters. However, designers often face the challenge of determining whether or not a DSP's on-board converter is up to the task and, if it is not, choosing an appropriate off-chip converter.

With any sensor signal - to data converter - to DSP signal chain there is a need for some form of analog processing. The selection of the converter, either on-or off-chip, has an impact on the analog pre-processing amplifier. We will discuss how a selection criterion for the amplifier is developed from an understanding of the source and the converter demands, as well as how the entire signal chain must be viewed as an integrated system, not just individual parts, for optimum performance.

January 2006

Jump start AMBA 3 AXI design verification with xVC enabled DesignWare Verification IP
Tuesday, January 17, 2006 7:00am PT / 10:00am ET/ 15:00 GMT and 1:00pm PT / 4:00pm ET / 21:00 GMT
Sponsored by ARM & Synopsys
The AMBA 3 AXI bus protocol is the newest and most capable on-chip fabric protocol introduced by ARM, delivering scalable performance, configurable to customers bandwidth/speed/area/power requirements.

The Role of Programmable Logic in Embedded Systems
Thursday, January, 19, 2006 9:00am PT/Noon ET
Sponsored by Actel and Altera
Join us in this one-hour special NetSeminar, as your host: Clive "Max" Maxfield, Site Editor of the industry's premier Programmable Logic and Structured ASIC website,leads an exciting discussion of the dramatically increasing role of programmable logic, with representatives from the worlds leading FPGA vendors - Actel and Altera - and the world?s leading embedded processor core vendor: ARM. Afterwards, join our host and his guests in a live Q&A session as they answer your questions and hear what your colleagues have on their minds.

Building Connectivity Into Factory Networks
Monday, January, 23, 2006 10:00am PT / 1:00pm ET/ 18:00 GMT
Sponsored by Agilent Technologies
In today's highly competitive world, using accurate, fast measurement methods could mean the difference between success and failure of your products. With precision S-parameter measurements you can be assured that you are getting the most out of your designs and the maximizing your product performance. Learn how Agilent can help you realize this key competitive advantage by joining our eSeminar on advanced calibration techniques.
*The focus of the seminar will be:
*The unknown through SOLR method for error correction
*TRL calibration for single reference receiver system
*Improved offset load calibration
*Database Calibration standard definition
*Expanded Calibration method

Building Connectivity Into Factory Networks
Wednesday, January, 25, 2006 9:00am PT/Noon ET
In years past, connectivity meant hoses and valves. Today, networks and protocols provide the links for equipment on the factory floor. Ethernet and TCP/IP have replaced many proprietary networks in recent years. Now ZigBee, and other new technologies are augmenting the push to automate the plant floor while providing seamless links to the front office. Join representatives from National Instruments, Texas Instruments, Freescale and Industrial Control DesignLine, in this hour-long NetSeminar, as they discuss the latest techniques for improving connectivity in your facility.

Spread Spectrum Clock Generation (SSCG) Technology for EMI Reduction
Thursday, January, 26, 2006 9:00 am PT/Noon ET
Sponsored by Cypress Semiconductor Corporation
Since its inception about 10 years ago, Spread Spectrum Clock Generation (SSCG), has been a valuable technology for EMI reduction and EMC compliance. A low frequency waveform is used to frequency modulate the system clock to reduce the radiated EMI emissions. As a result of this modulation, the harmonics of the system clock can be reduced by as much as 10 to 20 dB depending on the frequency and application. This seminar describes the SSCG technique, its benefits and advantages in comparison to other EMI reduction techniques, such as filtering and shielding, while explaining the important design considerations when implementing SSCG in digital systems.

A Practical Guide to High-Speed Printed-Circuit-Board Layout
Monday, January 30, 2006 9:00 am PT/12:00 pm ET
Sponsored by Analog Devices, Inc.
This NetSeminar will address high-speed analog and mixed-signal board layout from a practical perspective. Concepts will be presented and reinforced through examples and personal experiences. The seminar will focus on areas of board layout that will yield the greatest payoff in improving circuit performance, reducing design time, and minimizing time-consuming revisions.

Rapid Verification of ARM11 Processor-Based Platforms, Containing ARM PrimeCell IP, Using DesignWare VIP
Tuesday, January 31, 2006 7:00am PT / 10:00am ET/ 15:00 GMT and 1:00pm PT / 4:00pm ET / 21:00 GMT
Sponsored by ARM & Synopsys
In this seminar, you will learn about the PrimeXsys infrastructure and how the DesignWare Verification IP enables the development of a more thorough and reusable verification environment. The DesignWare Verification IP uses advanced verification methodologies such as a coverage driven constrained random verification process to quickly identify subsystem anomalies.

December 2005

Next Generation 2D and 3D Navigation Made Easy: Taking Complexity out of Developing Next Generation 2D and 3D Navigation Systems
Wednesday December 7, 2005 10:00am PT / 1:00pm ET/ 18:00 GMT
Sponsored by QNX Software Systems & Freescale Semiconductor
QNX is the only RTOS vendor to offer native support for both 3D graphics and multi-layer interfaces. QNX's latest graphics offering incorporates OpenGL ES, specially optimized for the QNX Neutrino RTOS. Coupled with state-of-the-art video hardware on the Freescale Media5200 platform, this solution provides developers with ability to build applications of outstanding quality while investing minimum development time, effort, and costs. Register for a free webinar to learn more about this technology.

Intel in Communications Fall 2005 eSeminar Series
Wednesday December 8, 2005 10:00am PT / 1:00pm ET/ 18:00 GMT
Sponsored by Intel Corporation
From VoIP to broadband wireless, new services and technologies are changing the competitive landscape in the communications industry. Comms engineers, systems architects and engineering managers are challenged to accelerate development cycles, while continuing to contain costs. This series of free e-seminars from Intel can help. You'll get practical information about emerging technologies that can help you design standards-based, modular, carrier-grade solutions that are more flexible, scalable and cost-effective than traditional systems and enable you to focus your resources on innovative new solutions and services to enhance profitability. As the industry moves forward, these e-seminars will help you stay ahead of the pack.

Uncovering the Solutions for Today's System Designs
Monday, December 12, 2005 10am PST/ 1pm EST / 18:00 GMT
Sponsored by Philips Semiconductors
Looking for answers to your design needs? Philips Semiconductors has developed a webcast to address those needs. The Philips systems design webcast will cover solutions for design problems in the following areas:
*Industrial control (robotics, measurement sensors, etc.)
* Display systems (LED displays)
*Power control (intelligent ballasts for lighting)
*PMBus control
*Aircraft transponder systems
*Weather sensing systems

Discover New DaVinci(TM) Products from Texas Instruments
Monday, December 12, 2005 10:00 am CT/11 am ET
Sponsored by Texas Instruments
Join us for the DaVinci webcast to learn about the newest breakthroughs of DaVinci(TM) Technology. Discover how the first products based on DaVinci Technology will simplify digital media innovation, saving months of development time and lowering overall system costs. With DaVinci Technology, TI has eliminated the complexity of digital video, making it as easy to implement as an off-the-shelf component.

Voltage Feedback or Current Feedback Op Amps in High-Speed Applications: Pros, Cons and Design Tricks
Wednesday, December 14, 2005 11:00 am CST/9:00 am PST
Presented by Texas Instruments & Avnet Electronics
Over the past 10 years, a wide range of high-speed amplifiers have emerged to support the needs of high-frequency design applications. Two particular types of amplifiers have found wide application; the current feedback amplifier and the more common voltage feedback amplifier. Each of these devices has particular applications for which they are best suited, in this Analog eLab, TI will explore the differences between these devices, namely their internal construction, and what that means for the external application circuit. Additionally, several key performance characteristics and design tricks will be illustrated using lab equipment similar to that used in characterizing these devices.

EE Times Industry Challenge: How Designers Select Silicon IP
Wednesday, December 14, 2005 11:00am PT/2:00pm ET
Sponsored by Denali Software, Inc., LSI Logic Corp., Mentor Graphics Corp, TSMC
As complex chip design has evolved from massive RTL synthesis toward integration of existing intellectual property cores, the selection of IP has become one of the most critical steps in the entire chip design process. Yet it is one of the least documented and least supported by tool vendors. Left to their own devices, design mangers must find sources for the IP they need, identify blocks with the right functionality and estimate their ability to integrate the blocks successfully into their design. Join EE Times Semiconductor Editor Ron Wilson and a panel of industry experts as they review the results of a recent global Web questionnaire explaining how design managers are dealing with the IP selection problem today.

ST Motor control Development Kit speed up design cycle and evaluation phase
Thursday, December 15, 2005 9:00 am PT/6 pm CET
Presented By STMicroelectronics
In today's hyper-competitive environment, getting your design to market fast can be the difference between success and failure. And with the multitude of motor control solutions available today you not only have to be fast but right first time.
Now you can get first-hand the latest on the development tools, motor control software libraries, and hardware reference platforms, which play a key role in helping you to manage the development steps, and reduce your development cycle time.

Driving precision converters: How to select the best voltage reference and amplifier for your ADC application
Tuesday, December 20, 2005 12:00 pm ET/9:00 am PT
Sponsored by Analog Devices Inc.
Today's precision data converters achieve new levels of accuracy and noise performance, but these attributes can easily be diminished with improper application. Join our NetSeminar and learn how to select the drive amplifiers and voltage references that will enable you to get the best possible performance from your precision A/D converter. We?ll also discuss real-world design techniques for minimizing parasitics by using effective layout and component selection, as well as how to calculate total expected signal chain errors, including noise, DC error, and offset voltage drift.

November 2005

Topaz: A MIPS32 24kf(TM) Core-Based Computing Subsystem for SoCs
Wednesday, November 8, 2005 1:00 pm PT/4:00 pm ET
Presented by K-Micro (Kawasaki Microelectronics)
Topaz is a revolution in the ASIC industry. The Topaz computing subsystem includes the MIPS32 24Kf processor, the Sonics SiliconBackplane(TM) and Sonics3220(TM) SMART Interconnects(TM), the SafeNet SafeXcel(TM) security engine, an off-chip industry-standard Open Core Protocol (OCP) interface, and numerous other blocks. To create a SoC for computing applications, customers merely need to add their proprietary logic to the Topaz computing subsystem, greatly simplifying their engineering efforts and speeding up their products' time-to-market.

Power Modules: Fast Transient Response, Noise Reduction and Minimizing Capacitors
Wednesday, November 9, 2005 9:00 am PT/11:00 am CT/Noon ET
Presented by Texas Instruments & Arrow Electronics
On complex boards, designers are increasingly called upon to provide more voltage rails for a wide variety of DSPs, ASICs and FPGAs. Frequently, as many as 6-10 voltages are required, creating power system design challenges for sequencing, EMI suppression and minimizing voltage deviation in the presence of current transients created by high speed digital circuits. In this eLab, TI will provide applications solutions for each of these challenges and demonstrate how to minimize the amount of input and output capacitance for DC to DC converters.

TTI's Technical Seminar Series: Be Smart - Choose the Right Part Connectors: The Race for Space
November 10, 2005 9:00 am PT/Noon ET
Presented By TTI, Inc.
Today's mezzanine cards deliver enhanced system performance, flexibility and upgradeability. As system and board designers continue to pack more sophisticated sub-systems into smaller and smaller form factors, the connector interface is becoming a critical factor in mezzanine card design and functionality. Tune in as leading connector expert Bob Hult of Bishop and Associates, Inc. along with experts from FCI, Molex and Tyco offer insight and advice on the latest technology, design features and benefits of high performance mezzanine connectors.

Tailored verification solutions and methodologies to take you from verification plan to closure
November 15, 2005 9:00am PT/ 12:00 pm EST
Presented Cadence Design Systems
As design and verification methodologies have become more complicated with the advent of SoCs and nanometer geometries, leading-edge electronics companies have had an enormous challenge adopting a large number of verification languages, methodologies, and technologies to address their unique problems. Design and verification teams require solutions that are integrated, tailored to their unique project team needs, and coupled with management tools and methodologies that take them from planning to design closure.
In this Netseminar you will learn about these three new families and how they can help you address the exploding complexities associated with SoC development. We will discuss the new technologies, methodologies, and IP that are available with each family and look at how these can be efficiently implemented to enhance your verification efforts and reduce your project risk.

General Design Considerations with RapidIO Fabric Technology
November 15, 2005 1:00 pm PT/4:00 pm ET
Presented By RapidIO Trade Association
Serial RapidIO technology is quickly becoming the open fabric of choice in a variety of applications, including wireless infrastructure, edge networking, storage, scientific, military and industrial equipment. This is largely due to the number of processor endpoints with RapidIO, available switch components on the market, and the value that the technology provides as a closely coupled, processor interconnect fabric. This seminar provides an overview of the design considerations in developing systems based on RapidIO technology, and reviews the tools available to support hardware prototyping, software development, and board layout.

Bridge solutions for I2C, SPI, Asynchronous (UART) interface and applications
November 16, 2005 10am PST/ 1pm EST / 18:00 GMT
Presented By Philips Semiconductors
Learn about the industry's first I2C/SPI to UART bridge chip, part of a new family of low-power bridge ICs that will simplify the design of connected devices. Philips will explain how this new SC16IS7xx family of bridge ICs provides designers with a compact, seamless bridge across the most widely used protocols including UART, I2C, and SPI. The seminar will include a serial protocol overview, including introductions to SPI, I2C and UART. Understand how these bridge ICs reduce the time, resources, and board space required to connect multiple devices for complex applications

Picture Enhancement -- How To Improve Image Quality from Sub-par Signals
November 17, 2005 11:00am PT/2:00pm ET
Presented By Philips
This special Editorial NetSeminar covers picture and image enhancement schemes and technologies. Presenters will discuss various hardware and software techniques that help reduce or eliminate video noise and improve the quality of legacy and standard definition video on HD displays. To that end, the picture enhancement technologies employed here have the capability of improving both standard and high-definition images. Presentations will be followed by a short discussion and Q&A session.

EETimes Editorial Net Seminar: The GigaByte threshold:Where to turn when DRAM power makes a difference
November 29, 2005 11:00 am PT/2:00 pm ET
Presented By Infineon Technologies
Power constraints are not news for computing systems today. From blade servers to notebooks, power dissipation has become a major factor in system cost and a serious threat to system performance. But in systems with a GigaByte or more of DRAM, there is another suspect to be interrogated. The DRAMs themselves can become a major source of heat. Given this trend, low power memory design becomes increasingly important. But are there any differences in power among DRAMs? Join EE Times semiconductor editor Ron Wilson in a panel discussion with senior industry experts for an in-depth discussion on trends, innovative technology and challenges for low power performance in computing and consumer products.

October 2005

RoHS...What Everyone Should Know
Wednesday, October 5, 2005, 9:00 am PT/Noon ET
Sponsored By Texas Instruments
With the industry wide RoHS ban less than a year away, Texas Instruments remains a leader in the RoHS conversion and has already completed this process for a number of products. This NetSeminar will touch on legislative requirements behind RoHS, TI definitions for various RoHS terms, part identification used by TI, and world class support tools that make the conversion easy for you.

Elements of the Analog Signal Chain
Wednesday, October 12, 2005:9:00 am PT/11:00 am CST/Noon ET
Presented By Texas Instruments & Newark InOne and Farnell InOne, subsidiaries of global distributor Premier Farnell plc
Sensors that measure real world variables seldom have output signals that can be directly connected to the data converter in a system. Typically, there are requirements to amplify, filter, shift offset, and perform other conditioning functions. These analog signal processing functions are accomplished by a family of devices, each one having unique strengths and application requirements. Understanding these family characteristics will help the designer produce the optimum analog signal processing system. Each data converter type requires special consideration in input signal conditioning. Understanding the basics of these converters helps the designer to properly condition the signal. The optimum signal chain design is accomplished when it is considered as an entire system and not just as individual pieces.

Circuit Protection: Don't Let Transients Kill Your Circuit. Learn about Modern Circuit Protection
Thursday, October 20, 2005 9:00am PT/Noon ET
Presented by TTI
Circuit Protection - Government regulations, application requirements, technology and supplier options. Confused? Hear what industry leaders have to say. Industry guru, Dennis M. Zogbi will moderate a group of experts from Bourns, Littelfuse, Raychem and Vishay. They will explore the different application and technology options available today. So don't get burned, register today!

Software Build Toolbox: Build Your Own Makefile Debugger
Tuesday, October 25, 2005:1:00 pm PT/4:00 pm ET
Presented By Electric Cloud
Wouldn't it be nice to be able to set a breakpoint in a Makefile? Learn practical, applicable tips for troubleshooting software builds. Among other tips, you will learn how to turn GNU Make into an interactive Makefile debugger with the ability to set a breakpoint in a rule and then interactively discover macro values, definitions, why the current rule is being executed and more. If you?re spending valuable time uncovering the causes of broken builds, this is a presentation you won?t want to miss.

Low-cost ARM(TM) microcontrollers with full-speed, fully compliant USB 2.0
Tuesday October 25, 2005 10am PST/ 1pm EST / 17:00 GMT
Sponsored by Philips Semiconductors
Your product designs can now feature USB capability with Philips' newest LPC214x series of USB 2.0 ARM7 microcontrollers. In this seminar you will hear an introduction to the LPC214x family and learn about other on-board communication peripherals including two 16C550-compatible UARTs with hardware handshaking, two Fast I2C-bus (400 kbps) interfaces, two SPI interfaces, up to 14 channels of 10-bit ADCs, 10-bit DAC, Real Time clock and 6 PWM channels. Learn about the LPC214x series' Fast I/O capability with speeds up to 3.5 times faster than competitive solutions. Understand how tiny size and low power consumption make this series ideal for applications where miniaturization is required.

Calibrating VNAs for Non-Standard or Dissimilar Connectors
Wednesday, October 26, 2005 9:00 am PT/Noon ET
Sponsored by Anritsu Company
A common problem when using a VNA is the lack of a calibration kit for the connectors of the DUT (Device Under Test). For instance, Push On connectors or the DUT has all female connectors and the calibration kit requires a through connection. The common solution of using adapters, usually gives poor results and a severe limitation on the ability to certify the measurement. The problem becomes more acute as frequencies move higher. Push On connectors, now available to 65 GHz and going higher, are an extreme example of these problems. Cal Kits are not commonly available and the DUT connectors do not allow a through connection of the test port cables. This seminar will explore techniques to reduce the problem to acceptable limits and will show data to quantify the benefits of numerous possible techniques.

September 2005

Image Sensors From A to Z
Thursday, September 8, 2005 9:00 am PT/12:00 pm ET
Presented by Cypress Semiconductor
This NetSeminar will provide a deeper and broader understanding of the issues facing designers of CMOS Image Sensors. Afterwards, you will have the unique opportunity during the live Q&A session with Matt Kavan, the Marketing Manager for Image Sensors, Memory and Image Sensor Division, Cypress Semiconductor Corporation, as he will answer all your questions and hear what your colleagues have on their minds.

March of the Penguins: The Linux Migration Story
Wednesday, September 14, 2005 8:00 am PT/11:00 am ET
Presented by Wind River
You've decided on Linux -- and you thought that was the hard part. You've selected tools and developed a tools strategy. Where do you go next? How do you migrate from today's environment to the Linux environment you want? This seminar will describe common issues and pitfalls in migrating from proprietary, commercial, or roll your own environments to a commercial Linux distribution.

What are the alternatives and how do you evaluate which approach to use? What can you do about legacy code? Are customizations still in your future? How do you select a co-sourcing partner? Join us for a review of Linux migration requirements, issues, and alternatives.

Analog eLab: Exploring the SPICE simulator TINA-TI
Wednesday, September 14, 2005 9:00 am PT/11:00 am ET
Sponsored by Texas Instruments & Avnet Electronics
The SPICE based simulation program, TINA-TI, is now available to the design community free from Texas Instruments. This powerful application program can perform DC, AC, noise, transient, and Fourier analysis. In addition to an intuitive schematic capture user interface, the program will perform a repeated analysis on a circuit as a component is stepped through a range of values. Comparison of results between TINA-TI and those obtained on the lab bench prove the simulation to be very accurate when employing good models.

Developing Security Applications with ARM TrustZone Software and open APIs
Wednesday,September 28, 2005; 7:00 am PT/10:00 am ET and 1:00 pm PT / 4:00 pm ET
Sponsored by ARM
As ARM TrustZone security hardware architecture is being adopted by leading silicon providers enabling them to deliver chipsets with advanced security built in, software developers are starting now to port their applications to the ARM TrustZone Software open framework and APIs, enabling them to reuse their expertise readily across multiple target devices. This presentation will provide an overview of the basic concepts behind the security architecture, the software framework and development tools available

August 2005

Automotive Networks: Opportunities and Challenges
Wednesday, August 10, 2005; 9:00 am PT/Noon ET
Sponored by Analog Devices, Freescale Semiconductor and Infineon Technologies
It has been said that a modern car, due to its high electronic content, is simply a chip on wheels. A more accurate description might be a rolling collection of processors, linked together. This NetSeminar brings together a panel of automotive networking experts from fields ranging from infotainment, multimedia, and telematics to power train and active suspension applications to give you the insight you need in understanding the technical challenges and how to meet them.

Jazz-up your user interface with PSoC™-enabled Capacitive Touch Sensing
Thursday, August 18, 2005; 9:00 am PT/Noon ET
Sponsored by Cypress
Learn how to quickly and inexpensively replace buttons, potentiometers, and other mechanical input devices with stylish, durable capacitive touch sensing solutions. Cypress's CapSense™ technology, based on PSoC™ (Programmable System-on-Chip™) mixed-signal arrays, offers flexibility, board space and cost advantages over competitive implementations. It also easily integrates multiple additional functions (e.g., LED drivers and LCD displays). This seminar is your ticket aboard one of the hottest technologies in embedded design: capacitive touch sensing.

Network Systems DesignLine Editorial Net Seminar: Requirements impacting IPTV set top box design
Wednesday, August 24, 2005; 11:00 am PT/2:00 pm ET
Sponsored by Analog Devices, Inc. and Freescale Semiconductor
The home networking industry is in agreement that IPTV is the next killer application. Needless to say, many more agreements will need to be reached at the technical level in order for design engineers to develop equipment that will bring IPTV applications and their associated revenues to fruition. As IPTV set top boxes (STBs) are the gateway to these applications and revenues, requirements concerning their design are of the utmost importance to IPTV's success. This Net Seminar will examine and discuss architectural and system-level requirements impacting STB design.

High Performance Delta Sigma ADCs Solve Complex Designs, Simply
Thursday, August 25, 2005; 1:00 pm PT/4:00 pm ET
Sponsored by Linear Technology and Nu Horizons Electronics
This NetSeminar will discuss the problems encountered by design engineers, as they have created a unique portfolio of high performance delta sigma analog-to-digital converters. Afterwards, you will have the unique opportunity during the live Q&A session with the Senior Design Engineer Mike Mayes, as he will answer all your questions and hear what your colleagues have on their minds.

July 2005

Meeting the Analog/RF Challenge
Thursday, July 21, 2005 11:00 am PT/2:00 pm ET
Presented by Tanner EDA
Rapid product development cycles and managed engineering costs are critical to a product's commercial success. Time-to-market pressures dictate that tools integrate efficiently into your design flow and that reasonable tool costs preserve limited resources for your engineering team. Presenters Paul Egan, Group Leader, Physical Design at CSR plc and Dr. Massimo Sivilotti, Chief Technology Officer at Tanner EDA, outline the trends and tool strategies that make up an effective analog/RF design flow.

Understanding and Applying DACs
Wednesday, July 27, 2005; 11:00 am PT/2:00 pm ET
Sponsored by Analog Devices, Inc. and Avnet Electronic Marketing
Digital to Analog converters (DAC's) are incredibly versatile components. Their capabilities have extended far beyond level setting, to applications in communications, video, audio, potentiometer and rheostat replacement, signal synthesis and much more. This seminar will give you a good understanding of how various DAC architecture's work, issues to pay attention to during selection and design, and how they can be implemented in real world applications.

GreenSupplyLine.com
Editorial Net Seminar: Designing for RoHS
Thursday, July 28, 2005; 11:00 am PT/2:00 pm ET
Sponsored by MatrixOne and PTC
With less than 12 months before RoHS takes effect, products that will be put on the market in July 2006 are being developed right now. What do electronics companies - OEMs and EMS providers need to do to ensure their design teams have access to accurate and robust databases on RoHS-compliant suppliers and products? Bruce Rayner, Editor-in-chief of Electronics Supply & Manufacturing, speaks with senior managers about the challenges of RoHS compliance within their companies.

Video Compression: Evaluating System Tradeoffs with H.264, VC1, and other Advanced Codecs
Thursday, July 21, 2005 11:00 am PT/2:00 pm ET
Sponsored by Texas Instruments and VideoImagingDesignLine
Video codecs are essential to digital video. This NetSeminar covers codec basics — how video compression is achieved — and explains why some codecs are better for specific applications, and how DSP processing power factors in. Includes details on H.264 and VC-1 (Windows Media) and general discussion on other codecs including On2, DivX, Motion-JPEG, and Real Video.

June 2005

Analog eLab: Utilizing High-Speed ADCs for Undersampling
Wednesday, June 8, 2005 9:00 am PT
Sponsored by Texas Instruments and Memec/Insight Electronics
Using high-speed A/D converters to digitize input frequencies above a converter's baseband region (dc to fs/2) is gaining much popularity in communications applications. In many applications the intermediate frequency (IF) can be as high as 250MHz — a frequency usually too high to digitize in an oversampling process. Join TI's Bill Klein for an engaging discussion on undersampling, or as it is sometimes called, direct-IF down conversion. Learn how undersampling can help you to reduce component count and eliminate a complete analog down conversion stage.

Discover Microsoft Windows Embedded — Technical overview of hardware support, shared source, power management, server support, and more.
Wednesday, June 8, 2005 11:00 am PT
Presented by Microsoft Corp.
Find out why Windows Embedded operating systems are right for your next embedded project. Windows Embedded operating systems are used in a range of devices—from PDAs to Industrial Controllers. This session will discuss the operating systems and expert tools that power the Windows Embedded Family specifically Windows CE, the hard real-time operating system built from the ground up for small-footprint devices, and Windows XP Embedded the componentized version of Windows XP Professional. We'll discuss key features for both products.

TTI Technical Seminar Series: Be Smart — Choose the Right Parts
Connectors: The Need for Speed
Thursday, June 9, 2005 9:00 am PT
Sponsored by TTI, Inc.
So many options, so little time. What will work best for you? Tune in as the industry's authority on connectors, Bob Hult of Bishop & Associates, Inc., along with experts from FCI, Molex and Tyco offer some invaluable advice on high speed backplane connectors.

Analog Devices Presents...INTEGRITY RTOS and Blackfin Processors for Security, Reliability or Time to Market: Who Says You Have To Choose?
Thursday, June 23, 2005 9:00 am PT
Are your embedded designs secure? Do you worry about your next product being vulnerable to attacks by hackers? This webcast will look at how the royalty-free INTEGRITY real-time operating system takes advantage of the Blackfin architecture, including the Memory Protection Unit, allowing you to build totally reliable, absolutely secure, and maximum performance products—in the least time and with the lowest production cost.

Analog Devices Presents...INTEGRITY RTOS and Blackfin Processors for Security, Reliability or Time to Market: Who Says You Have To Choose?
Tuesday, June 28, 2005 6:00 am PT
Are your embedded designs secure? Do you worry about your next product being vulnerable to attacks by hackers? This webcast will look at how the royalty-free INTEGRITY real-time operating system takes advantage of the Blackfin architecture, including the Memory Protection Unit, allowing you to build totally reliable, absolutely secure, and maximum performance products in the least time and with the lowest production cost.

Performance Clocks: Demystifying Jitter
Wednesday, June 29, 2005 11:00 am PT
Presented by Analog Devices, Inc.
Join us as we delve into the realm of sub-picosecond jitter clocks. The relationship between jitter and phase noise will be explored in detail and methods for measuring sub-picosecond jitter and ultra low phase noise will be discussed. This NetSeminar will cover performance clock IC applications and considerations and the use of ADI's new ADI SimCLOCK clock simulation tool will be featured.

May 2005

Analog eLab: Precision Signal Conditioning for Delta-Sigma Converter Systems
May 11, 2005 9:00 AM PT
Presented by Texas Instruments & Arrow Electronics
Delta-sigma data converters - precise and accurate, but only in the right environment. To realize their full potential, careful consideration should be given to input signal conditioning, reference voltage source and design trade-offs influencing power, speed and accuracy. Explore the precision and accuracy characteristics of Delta-Sigma data converters, the filtering and amplification required to realize top performance and how to determine when signal conditioning is unnecessary. Lab sessions highlight discussions.

TTI Technical Seminar Series: Be Smart — Choose the Right Parts
Capacitors: Choose the Right Cap for the Right App
May 25, 2005 9:00 AM PT
Sponsored by TTI, Inc.
Passive guru, Dennis M. Zogbi of Paumanok Publications, Inc. and experts from AVX, Kemet, Murata and Panasonic share a wealth of market trend information on capacitors. Determine which capacitor works best for you from 1-330 microfarads.

Leveraging Advanced Converter Architectures for Impedance and Capacitance Sensors
May 25, 2005 11:00 AM PT
Presented by Analog Devices, Inc.
Join our ADI experts and explore new techniques in applying sensor technology to areas traditionally considered off limits due to signal chain complexity, limited size, performance, or cost. Revolutionary new breakthroughs in front end impedance and capacitance to digital converter (IDC/CDC) IC technology has provided a way for sensors to deliver superior accuracy, in a smaller footprint, at a fraction of the cost of existing more complex, expensive, and less accurate solutions. IDC and CDC application considerations and solutions will be discussed.

April 2005

Find Every Bug in Minutes Using New Trace Technology
April 28, 2005 9:00 AM PT
Green Hills Software, Inc.
The traditional trial-and-error approach to embedded software debugging is inefficient when it comes to finding routine bugs and ineffective when it comes to rooting out timing-sensitive and non-reproducible bugs. This NetSeminar will demonstrate tools that eliminate the need for trial-and-error debugging by taking advantage of new trace technology. These tools significantly reduce debugging time while simultaneously improving product reliability.

March 2005

Analog Devices Presents.RTXC Quadros Dual-Mode RTOS for Blackfin Processors
March 3, 2005 9:00 AM PT
Analog Devices and Arrow
This next webcast in the "Analog Devices Presents" series provides a look at Quadros Systems' unique RTXCT Dual-Mode Real-Time Operating System (RTXC/dm) for applications running both digital signal processing (DSP) and traditional micro controller operations on the Analog Devices Blackfin? Processor. This overview of this unique RTOS and demonstrates how developers can use it to get highly efficient control processing and signal processing tasks on the single core Blackfin processor.

Analog eLab: Amplifier Noise: Types, Origins, Magnitude Predictions and Reduction Techniques
March 9, 2005 9:00 AM PT
Texas Instruments and Memec Insight
All electronic circuits generate noise. Join our host Bill Klein and his guest, fellow Senior Applications Engineer, Neil Albaugh, co-sponsor Memec/Insight representative Dan Ngai and explore the random nature of various noise signatures and their origin. A new tool is introduced to predict the noise from operational amplifier circuits and techniques are explored to improve the noise performance of amplifier circuits. Lab tests demonstrate various noise signatures and results from reduction techniques.

Visual Embedded Design - Say Good-bye to C and Assembly Coding
March 16, 2005 9:00 AM PT
Cypress
One of the key drawbacks to embedded design is the intricacy of current embedded development/design environments. Currently designers need to create code using Assemble or C languages. This seminar will introduce a new development tool for quickly and painlessly creating custom embedded designs.

iCoupler® Isolation Technology: Eliminate Those Optocoupler Headaches!
March 17, 2005 11:00 AM PT
Analog Devices Inc.
Analog Devices' iCoupler technology is an alternate signal isolation solution to optocouplers. Based on the use of micro-transformers fabricated directly on-chip, iCoupler products offer a variety of benefits compared to optocouplers. These include improvements in cost, size, performance, power consumption, and reliability. This seminar will provide an overview of the iCoupler technology covering the following topics: principles of operation, benefits, safety and reliability, product overview, and representative applications.

February 2005

Current Sensing in Automotive Solenoid Control
February 16, 2005 11:00 AM PT
Analog Devices, Inc.
Careful current measurement is critical to accurate control of solenoids in automotive fluid control applications. Precision current sensing allows for finer, or additional adjustments, in automotive solenoid control applications and can enable improved diagnostics capabilities and system efficiencies. Analog Devices current sense and difference amps will be featured.

January 2005

Using Low Jitter Clocks to Enhance Data Converter Performance
January 13, 2005 2:00 PM ET/11:00 AM PT
Presented By: Analog Devices, Inc.
As data converters rapidly trend toward higher sampling frequencies, at higher bit resolutions, the quality of the sampling clock becomes an increasingly critical factor in the ultimate level of dynamic performance achieved by a given converter application. This NetSeminar will explore sampling clock parameters, including phase noise (in the frequency domain) and jitter (in the time domain) and how to analyze their impact on converter performance. ADI's new sub-picosecond performance clock family will be featured as a clocking solution for data converters with real-world applications and performance results included in the discussion.