CRYSTAL CITY, Va. -- Analog designers are not ready for high-level behavioral modeling. That was the conclusion of a series of presentations and panel sessions here at BMAS '97, an IEEE-sponsored conference on behavioral modeling and simulation that was co-located with the recent VHDL International Users Forum (VIUF).

AHDL advocates are still doing missionary work, panelists said. "There is too much inertia," said analog expert James Bardy of the University of Waterloo (Ontario) at an evening panel chaired by Prasad Subramaniam of Lucent Technologies' Bell Labs Design Automation Group. "Designers feel they must use transistors for detailed simulations. Asking them to work in a high-level language only increases their workload."

The panel included analog model builders Ian Getreu of Analogy Inc. (Beaverton, Ore.) and Dan FitzPatrick of Apteq Systems (San Jose, Calif.); academics like Bardy; and users, such as Ron Vogelsong of Harris Semiconductor (Melbourne, Fla.) and Bob Pease, a staff scientist and analog circuit designer at National Semiconductor Corp. (Santa Clara, Calif.).

"Using Spice is as risky as playing the stock market," said Pease. "Saying 'It seems to work' is as bad as saying 'It is alleged to work.' "

And getting designers to work on a more abstract level than Spice would be difficult. Behavioral models describe analog phenomena, such as current and voltage waveforms, in abstract terms using a hardware-description language such as VHDL or Verilog. But "things that are important to modeling are not necessarily important to designers," said Harris's Vogelsong. "Designers don't enjoy programming."

Using a high-level analog model could dramatically improve design turnaround and product quality, acknowledged Getreu of Analogy. But creating a useful model, he said, is either "easy or difficult: easy if somebody gives it to you, difficult if you have to create it yourself."

The inability of analog designers to create simulator models for what they do is particularly troubling for such intellectual-property vendors as Mentor Graphics Corp. (Wilsonville, Ore.). Models are the foundation of any useful intellectual property. But Ariel Cao, who directs the analog and mixed-signal product development effort for Mentor, worries that analog designers cannot construct adequate models for their products.

Cao cited three considerations: reusability, accuracy and stability. Can designers come up with the right approximation technique to simplify the equations that describe their circuits? Can they devise a model that doesn't break the simulator? Could someone look at a model two years later and still understand what the equations were supposed to do? Is everything properly documented?

The issue, Cao believes, is troubling enough to affect any intellectual-property development in the mixed-signal arena. As a consequence, he is forming an "R&D council" through which EDA experts, university professors and semiconductor designers will identify the kinds of models that need to be developed and the skill sets needed to develop them.

One consequence, Cao speculated, could be a five-day intensive modeling seminar--sponsored by Mentor and others--that could cover the algorithms and coding skills necessary for analog model development. "It's not good for a company like Mentor to have its customers stuck on the basics," Cao said.

Some would argue that the question should be not whether analog designers are ready for behavioral modeling but whether behavioral modelers are ready for analog. Indeed, analog modeling is an unusual theme to discuss within the context of a VHDL forum, since VHDL makes a conceptual separation between behavior and structure.

That distinction is a relatively painless matter when describing the behavior of digital systems in abstract terms: Data flow and state machines, and the movement of ones and zeros, can be described independently of the mechanisms that generate them.

But analog behaviors--particularly the rise and fall of voltages and currents over continuous time--are more difficult to describe without referring to the generating structures. High voltage and current, for example, come from big transistors, not small ones.

Contrary view
Yet the BMAS seminar proceeded as if VHDL's segregation of structure and function did not exist. Most of the presentations on analog modeling, including the keynote address by professor Franco Maloberti of the University of Pavia (Italy), advocated a bottom-up modeling methodology that runs contrary to the top-down approach advocated and supposedly facilitated by HDLs.

Harris's Vogelsong, in his formal presentation on analog model development, did demonstrate what could be done with a comparator in VHDL. But in a presentation on statistical modeling techniques, professor John Swidzinski of Texas A&M University (College Station) acknowledged Analogy's Saber simulator and Mast modeling language and Cadence Design Systems' Spectre, but not VHDL.

Kartikeya Mayaram of Washington State University, Pullman, similarly ignored VHDL in a presentation on behavioral modeling. Even keynoter Maloberti, when asked in a question-and-answer session how he would resolve the segregation of structure and function, admitted he's stumped.

Scant mention was made at the conference of VHDL-AMS, the analog/mixed-signal extension to VDHL developed by the IEEE 1076.1 working group, which struggled mightily to reconcile the segregation of structure and function imposed by VHDL.

But Analogy's Getreu, invoking football imagery, said the VHDL extensions "are only the first down. We've got a long way to go to reach the goal line."

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