PRINCETON, N.J. -- A recent breakthrough in quantum-dot transistor design may bring the technology one step closer to becoming a practical reality in computer chips.

Researchers at Princeton University, with colleagues at the University of Minnesota in Minneapolis, have fabricated a single-electron transistor based on silicon technology that runs at room temperature. Earlier quantum-dot devices were built in gallium arsenide and operated at very low temperatures.

"Up until now this has been impossible," said Stephen Chou, the lead researcher at Princeton, who reported building quantum-dot transistors out of silicon with operating temperatures of about 170K about two years ago. At the time this was considered a record temperature, but it's too low to be practical for computer-chip design.

A key difference in the new design is that the quantum dot is located inside the channel of a field-effect transistor. In the previous work, the researchers made single-electron memory devices with the dot positioned between the channel and the control gate. In the new design, a small silicon dot serves as a switch element rather than a memory element. Sitting inside the channel, it can be used to turn current on and off.

Unique functions
By establishing an electron-confinement region only nanometers in diameter, quantum dots are able to perform unique electronic functions, due to the complex quantum behavior of a few or even a single electron trapped in the dot. The dot used in the Princeton work was defined as a polysilicon region only 12 nm wide, which was also the length of the channel.

Small size means faster devices, lower power consumption and unique functionality. Cost is also an issue; thanks to small area fabrication, more devices can squeeze onto a chip.

Besides reducing the area of definition to create ultrasmall devices, researchers are also finding ways to enlist the help of basic semiconductor processes. For example, oxidation, a common process in defining CMOS transistors, was used to directly shrink the actual confinement area in the Princeton device. "When you oxidize the silicon, the stress of the oxide causes the narrow part to become narrower," Chou said. According to its I-V characteristics, the energy-level separation is about 100 meV.

Single-electron-dot technology could turn out to be an essential development for future transistors since, as devices shrink, size-related effects will begin to have an impact. "People have been shrinking the sizes of the transistors for years now," said Chou. "However, when we looked at how many electrons are needed for every switching action as a function of the device size, we realized that in order to make a device size of about 20 nm, we were dealing with less than 10 electrons per switching function." The upshot, he said, is that "in future transistor designs we will only be dealing with a few electrons. So, the single-electron effect is going to dominate transistor design regardless of whether we like it or not. The question is how do we take advantage of it."

Ultimately, applications of the technology will require a practical lithography approach, which Princeton researchers term "nanoimprint" lithography.

Prototype devices use electron-beam methods to get to very small dimensions. "This can only be achieved by using electron-beam lithography, which is a very slow process and can not be used for manufacturing," said Chou. "But we can use the e-beam lithography to make a mold."

In the team's imprint lithography, "we would first create a mold and that mold forms the shape of the resist," he said. "It may take several days or even a week to make the mold, but once you have the mold then you can produce the wafer very quickly. So that will be the approach for making quantum-dot single-electron transistors."

TI demos applications
Recent applications have been demonstrated by a Texas Instruments group that used quantum-effect devices to make logic circuits in GaAs. "They found that for the same logic function, they can use less transistors by using the quantum device," said Chou. "So, we can do the exact same thing with the single-electron transistors."

The short-term goal is to make the dots smaller, so that the single-electron effects will become stronger at room temperature. Chou and his colleagues, Lei Zhuang and Lingjie Guo, also plan to use nanoimprint lithography to make larger arrays of the transistors.

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