Posted: 3:00 p.m., EST, 4/29/98

Configurable computing, like the parallel-processing trends that preceded it, was launched with the enthusiastic recognition that VLSI advances coupled with new processor designs could result in a massive leap in performance. But like other approaches to advanced computing, configurable computing is running up against the puzzle of translating high-level problems into code that low-level hardware components are able to efficiently crunch.

In theory, the idea is attractive in its simpl icity: Rather than write step-by-step algorithms for a fixed circuit configuration, simply use field-programmable gate arrays to rewire the circuit for the problem. But once computer designers began to move down that path, the simplicity of configurable computing began to take on complexities of its own.

Ultimately, software complexity has returned to plague configurable-computing design through the problem of compilation. For fixed hardware systems, compilation means translating high-level procedural statements into the binary code that the machine executes. For configurable computers, the translation process must go much further, translating the code into a wiring diagram for the machine itself.

Currently, two competing trends attempt to address the problem. One approach dispenses with FPGAs entirely. Taking a coarse-grained view, standard circuit blocks such as microprocessor cores, memory arrays and floating-point units are configured via program-mable interconnect schemes. The other appro ach makes a frontal assault on the high-level programming problem by borrowing some of the best ideas to come out of conventional programming.

The former-doing away with FPGAs-was vigorously defended at the recent IEEE Symposium on Field-Programmable Custom Computing Machines here (see April 20, page 6). In a presentation of National Semiconductor Corp.'s National Adaptive Processing Architecture (NAPA), project engineer Charlé Rupp, flatly stated that programming via circuit synthesis is simply too-intractable a problem to tackle.

The coarse-grained approach eases the programming problem by including complex high-level circuit blocks that programmers already understand, Rupp said. The method also eases the problem of compiler design, since the compiled code does not have to reach all the way down to circuit configurations.

Others at the conference, while agreeing that high-level programming tools are essential, were more optimistic about blending them with low-level circuit syn thesis. Oskar Mencer, a researcher on Stanford University's PAM-Blox project, pointed out that FPGA computing could easily beat microprocessors on performance and other critical benchmarks, such as power consumption. FPGA computing only falls short on programmability, and the problem is therefore worth tackling.

"Custom computing machines have not been commercially successful because of the clumsy programming tools that are available," Mencer said, pointing out that the only readily available tools are geared to circuit design, rather than high-level algorithm design.

Mencer's group was one of three projects tackling the high-level programming problem by selectively borrowing from conventional programming. Conventional microprocessor-based systems have inherited sophisticated compiler technology that developed over decades to link increasingly abstract software structures with the underlying von Neumann architecture. While it may not offer the ultimate in performance, the fine-tuned match betw een the two does solve most problems in an acceptable amount of time. In addition, the conventional high-level-language/compiler/CPU technology is widely accepted, and benefits from the support of a huge infrastructure.

While popular languages such as C and Java may be a poor match for the essentially parallel, data-flow structure of circuits, they have the overwhelming advantage of widespread support in the technical community. The new thrust is blending high-level software structures such as object-oriented programming with lower-level structures and techniques taken from hardware-description languages. Proponents expect the combination could prove to be the critical path from high-level problem descriptions to the underlying circuit diagrams that yield solutions. By making dynamic circuit synthesis available through familiar programming methods, the power of configurable computing could be delivered to a broad group of scientists and engineers.

In addition to Mencer's group, an FPGA design system at the University of California, Berkeley, is adapting the object-oriented features of Java to create a hardware-description approach that operates within a familiar programming environment while a dynamic HDL based on Java uses the constructor/ destructor function of software objects to capture the wiring-on-the-fly aspect of configurable computing. The language is JHDL, being developed at Brigham Young University (Provo, Utah).

Java helps
Researchers hope all of these systems will elevate configurable-computer programming from its current circuit-design tool level into a method that is accessible to high-level programmers. The overall strategy with these efforts is to find those aspects of high-level languages that can be used to define and manage libraries of circuit components. Java turns out to have many characteristics ideal for the job, according to Michael Chu, one of the Berkeley researchers.

"We would like the programming system to be retargetable to different FPGA platforms, have good run-time performance and allow the programmer to perform optimizations at a high level," Chu said. Unlike C++, which arose from a non-object-oriented language, Java was designed around that type of structure. In addition, the language is highly portable, and the Berkeley design is adding to that by building general circuit-synthesis libraries, as objects, that address commercially available FPGAs.

The method is based on circuit-module generators, a low-level feature that is used in circuit-design systems. "Our design philosophy is to allow the programmer to compose circuit components, which are objects in the programming system," Chu explained. Circuit-module generators already have an object-oriented flavor to them, and therefore dovetail easily with object structures.

The method has been used in an ad hoc manner in several circuit-design systems. The basic idea is to build simple iterative routines that can generate a family of circuits, depending on the value of paramet ers. For example, instead of writing a hardware-description routine that generates a 16 x 16-bit multiplier, a generator would be written as an iterative loop that builds nxm multipliers by adding more bits with each loop. The circuit designer therefore only needs to enter 16 for the parameters n and m to realize a 16-bit multiplier.

The efficiency of generators comes from the reusability of the basic code, a concept that object-oriented structures introduced into high-level programming. "It turns out that circuit-generator systems are easy to embed into existing object-oriented frameworks," Chu said.

Rather than writing a family of circuit generators in a hardware-description language, the Berkeley group used the full object-oriented capabilities of Java. Thus, while a given generator has basic code that constructs instances of a circuit block, it is also an object that can perform many other high-level functions, such as simulation and partial evaluation, that add programming utility. In add ition, the hierarchy of object families helps to organize the FPGA program into circuit hierarchies in a natural way.

Programming simply becomes a process of building custom circuit-generator objects from a basic library of circuit-generator objects. Each object has local methods that wire up the subcomponents and initialize input and output terminals.

The approach enlists the programmer in the optimization process, since the object hierarchy makes the circuit structure explicit. The programmer can simulate and observe the system's behavior as the object classes are being constructed. Components can be easily added or rewired using basic object-construction functions.

The object-oriented structure also makes it easy to incorporate a general functional level of description that is independent of the specific library of circuit generators. The basic function of standard components such as adders, counters and multipliers can be specified in a class of objects, which then access different circuit-generator libraries associated with specific FPGA families, Chu explained. So far, the group has built a Java class and a library of circuit generators for the Xilinx 4000E series of FPGAs.

A similar strategy is being pursued by Mencer's group at Stanford, except that the language is C++ and the Digital PAM (programmable active memory) system is the target platform. Called PAM-Blox, the system uses C++ objects to represent hardware blocks. Mencer pointed out that the system allows the FPGA programmer to optimize a design at any level of abstraction, which is essential to getting good performance. Another benefit will be the ability of programmers to share object libraries, creating an open system for group software development.

The system was designed to run on top of an FPGA synthesis tool called PamDC, which is written in C++ and compiles circuits for the PAM architecture. The PAM system was developed at Digital Equipment Corp.'s Paris Research Laboratory shortly after Xilinx Inc. i ntroduced FPGAs in the mid 1980s, and therefore represents one of the defining architectures for FPGA computing. The system uses FPGA arrays as coprocessors, which are configured by a host workstation.

The PAM-Blox system starts with a library of fixed hardware components that are represented as objects in PamDC. These basic objects are used as building blocks for a high-level circuit generator. While a conventional circuit generator uses the basic gates of an FPGA as primitive components, PAM-Blox uses more-complex hardware objects.

Dynamic computing
Research at Brigham Young University is viewing another fundamental issue in FPGA computing through the object-oriented paradigm. One fun-damental distinction between circuit design and FPGA programming is the dynamic nature of the latter, pointed out Peter Bellows, who devised the Java-based hardware-description language called JHDL with fellow researcher Brad Hutchings, to capture that aspect of configurable computing.

The re ally challenging aspect of FPGA computing is the need to synthesize and configure circuits as a program is running. A very similar problem had to be solved by object-oriented compilers, since objects are created and destroyed dynamically as a program executes, Bellows pointed out.

Objects therefore include constructor/destructor code that allocates space in memory and initializes parameters when an object is invoked, then releases the memory when it is no longer in use. Similarly, FPGA configurations need to be allocated over an array of gates when they are needed. In JHDL, circuit configurations are represented as objects and the same type of constructor approach is used to configure them onto a specific FPGA array.

These systems are making a game attempt to enlist the most important resource available in circuit-design systems: an experienced engineer who knows how to optimize circuits, with the wisdom obtained through decades of conventional programming. The approach will be tested against other con-figurable-computing philosophies, such as high-level behavioral synthesis, which attempts to build the ultimate circuit compiler and coarse-grained configurable systems such National's NAPA, which elevates the hardware to a level closer to software structures.

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