SUNNYVALE, Calif. — Though overshadowed by IBM Corp.'s high-profile effort to field copper interconnects, Advanced Micro Devices Inc. is quietly forging ahead with development work to take the next-generation semiconductor technology from the research lab into the real world, EE Times has learned.

To date, AMD has successfully fabricated two test chips with copper interconnects, a company official said. "One is what I'll call a pure test [chip]," said Don Wollesen, director of technology and reliability engineering at AMD here. "It has structures on it, such as transistors, wires and contacts — all the nuts and bolts you use to make an IC. We made some of those and things looked pretty good."

AMD's second test effort involved far-more-complex static RAMs. "We don't sell these, but we used them as kind of an interim test vehicle," said Wollesen. "We've got two of them — a 256-k SRAM and a 1-megabit SRAM."

Wollesen reported that the SRAMs were fabricated with copper on the upper layers in 1997.

As for the current status of copper at AMD, Wollesen said he was not free to provide specifics. "We're continuing to try to find out where the limit on the minimum feature size is and what our capabilities are," he said.

In working with copper, Wollesen has found that implementing the interconnects on the upper layers of an IC, where loose-pitch structures typically appear, is relatively straightforward. "You don't have an aspect-ratio problem, which you run into if you're trying to do, for example, a 0.2-micron-wide [copper] line in a 0.18-micron technology," he said.

Stumbling block
Indeed, depositing copper interconnects on the lower metal layers of an IC, where such high-aspect-ratio vias and holes appear, is a major stumbling block for today's technology. The problem is that it's difficult for current-generation copper deposition and plating equipment to completely fill in those deep, wide gaps. Often, voids or cracks remain in the copper.

The current crop of fabrication equipment aimed at copper hasn't licked all the problems presented by the new process, it appears. "I think that all of the equipment for copper at this point in time is still development [grade], as opposed to engineering or manufacturing pieces of equipment," Wollesen said. "CVD [chemical-vapor deposition] copper has got its problems and the electrochemical plating equipment has its problems. They both work, but I don't think either one of them works well enough for very fine-pitch stuff."

The semiconductor equipment industry is racing to embrace copper. For example, this week, two equipment makers — Lam Research Inc. and Novellus Systems Inc. — linked up in a research agreement to develop fabrication solutions for copper interconnects.

Wollesen, who is a member of the steering committee for Sematech's National Technology Roadmap for Semiconductors, noted that copper interconnects didn't even appear on the road map until 1994. AMD began studying the technology in 1995.

Looking ahead to the time when copper interconnects will be practical, Wollesen said, "We don't see it [copper] happening until the 0.18-micron generation, which is what IBM has announced. We don't believe it will be any sooner than that."

As to whether AMD itself will use copper when it moves to 0.18-micron process technology, Wollesen said, "We're looking at it. We haven't made the decision at this point."