SANTA CLARA, Calif. — While Intel Corp. stayed mum on the causes and systems vendors dismissed the effects of the delay in the Merced processor, long-suffering Digital Equipment Corp. suddenly found itself with a thin ray of hope in pitting its Alpha microprocessor against Intel's processor dominance.

Intel this week declined to add further details to its May 29 statement, made after the close of the stock market, that its first 64-bit CPU would slip at least six months from an expected 1999 ramp to sometime in 2000.

An Intel spokeswoman said the processor giant underestimated the complexity of executing on what is expected to be a 25-to-30-million-transistor design that executes both a new 64-bit instruction set and 32-bit legacy code.

Hewlett-Packard Co. (Palo Alto, Calif.), Silicon Graphics Inc. (Mountain View, Calif.) and other enterprise-system vendors with a stake in the transition from Intel's IA-32 to IA-64 said the slip would have little impact on their businesses.

"It gives a small amount of opportunity to Digital, but it's not handing the market to them either," said Dean McCarron, an analyst with Mercury Research (Scottsdale, Ariz.).

A slip of six months gives Digital time to move its latest Alpha CPU, the 21264, from 0.25- to 0.18-micron at the same time Merced comes out at 0.18 micron. The 21264 is first being fabricated on 0.35-micron design rules, being shrunk to 0.25 micron next year and then moved over to 0.18 micron.

"We've done 64 bits since spring of 1993. We've got five years of experience there. The window will remain open that much longer," said Jesse Lipcon, vice president of Digital Equipment's Unix and Open VMS systems business unit (Maynard, Mass.).

The key to the process parity, according to Lipcon, is that Alpha's 21264 will be nearly half the size and faster than Merced when the latter starts shipping.

The 21264 produced on Alpha's CMOS6 0.35-micron process clocks at about 600 MHz and comes in the 30-to 40 SPECint range and 45 to 60 SPECfp "once all the compiler tuning is done," Lipcon said. The shrink in the CMOS7 process will raise the clock rate into the 750-MHz range. At 0.18 micron, however, the 21264 is expected to hum at 1.1 GHz with ratings of roughly 70 SPECint and 100 SPECfp, Lipcon added.

Merced is expected out at 800 MHz and 50 SPECint95 and 100 SPECfp95, according to estimates from market-researcher MicroDesign Resources (Sunnyvale, Calif.). Sun Microelectronics Inc. (Mountain View, Calif.) is expected to sample its 600-MHz 64-bit UltraSparc3 processor late this year on a 0.18-micron CMOS process from Texas Instruments Inc.

Lipcon said Alpha is on a 0.35-micron process measuring 700 mils on a side, while industry estimates for early versions of Merced have it at 750 mils a side in 0.18-micron process. Lipcon estimates that Digital can shrink the 21264 to 400 mils on a side in the Intel 0.18-micron process.

Push me, pull you
Beyond that, there's a demand pull and a technology push beneficial to Alpha and Digital, Lipcon added. When Alpha first came out, memory prices were high, Digital charged $100 per Mbyte for main memory. Figuring a 4-Gbyte floor for main memory in a 64-bit system, $1 million systems had $400,000 in memory. With memory prices going down, that main memory entry fee is down to $40,000. So 64 bits begins to migrate quickly to systems costing less than $100,000, he said.

"The dilemma for Alpha has always been the software-supplier acceptance," said Jim Carlson, director of worldwide marketing for HP's IA-64 effort. "It looks great technically on paper, but if the marketplace doesn't buy it, a half-year slip in Merced isn't going to hurt because they've been out there for three to four years."

Carlson and other workstation and server vendors played down the Merced slip, even though in at least one niche (Unix on Merced), spending was forecast to increase from 15 percent of all Unix server dollars to 40 percent in the next four years.

For HP, which developed the IA-64 architecture with Intel, the slip only affects the rollout of servers and workstations targeting that architecture. HP is still maintaining a road map for its longtime PA-RISC systems. The engine that runs them, currently the PA8200, tops out at 240 MHz and is in systems targeting applications such as online transaction processing.

The PA-RISC family road map will migrate to the PA8500 and the PA8700 before HP customers make the transition to IA-64. HP even has a transition system targeted for the PA8500 processor in which customers only will need to swap in a Merced board to make the transition from PA-RISC to IA-64, said Scott Emo, technical marketing director for IA-64.

Many OEMs are more interested in eking out the maximum performance from clustered, symmetric multiprocessing systems using multiple 32-bit CPUs, and hold that a move to 64-bit systems can be held off for most applications.

Santa Cruz Operation (Santa Cruz, Calif.), which worked closely with Intel for the last two years on developing a 64-bit Unix OS and related tools for Merced, won't be affected because most OEMs aim to break into the enterprise market with more robust 32-bit systems, said Mike Foster, director of Unix systems marketing for SCO.

Even so, OEMs are deeply involved in Merced development, and many are seeking an advantage by trading design expertise and intellectual property.