SANTA CLARA, Calif. — Amidst reports of a bug involving its upcoming Xeon microprocessor, an examination of Intel Corp.'s technical data shows that the company's Pentium II microprocessor is no stranger to glitches when used in multiprocessing systems.

That conclusion comes as Intel declined to comment on reports of a bug involving Xeon — its new Pentium II-class CPU — and its companion 450NX multiprocessing core-logic chip set.

The reports claimed that a glitch caused four-way multiprocessing systems built with the chips to lock up under certain unspecified operating conditions.

An Intel spokesman wouldn't comment on the reports, but said that the company would proceed with its planned unveiling of Xeon on Monday, June 29. "We're going to go ahead with the launch, and we will have our OEMs there showing Xeon workstations and servers," he said.

Reached at Intel's chip-set operations in Hillsboro, Ore., the Intel engineer assigned to Xeon and the 450NX also declined to talk. "I really can't say anything," he said.

However, Intel's technical documentation shows that current-generation Pentium IIs are plagued by a variety of problems which surface during unusual operating conditions. (Xeon is essentially a Pentium II with larger caches and a faster processor bus.) Some of the more interesting bugs, or errata, show up in multiprocessing configurations.

A case in point is Intel's so-called erratum 16: "System may hang due to internal protocol violation." As outlined in company technical documents, the bug rears its head when "a snoopable transaction is issued on the bus and the cache line being accessed is in the modified state."

In such situations, the CPU attempts to send an updated copy of the cache line out to the the system bus. Sometimes, this transfer is never completed. In such cases, a "data-busy" signal gets issued but never gets reset. As a result, the system hangs up indefinitely.

Intel's bug report stresses that the problem occurs only during a rare, specific sequence of events over the bus. The company also notes that the glitch is more likely to occur in multiprocessing systems than in single-processor configurations. However, Intel reports that there is currently no workaround for the erratum.

All told, Intel's latest public bug list for the Pentium II, issued this month, shows six errata linked to multiprocessing configurations.

For example, another possibly problematic glitch involves a so-called "livelock" situations, which can occur in two-way multiprocessing systems. The bug sometimes arises when both of a system's CPUs are attempting to complete write-back operations over the bus. An infinite loop can be set into motion, as the system bounces back and forth between both processors, causing a lock up.

Xeon employs the basic Pentium II architecture but adds enhanced cache, a 100-MHz processor bus and the ability to address several gigabytes of memory. Xeon, which utilizes Intel's new Slot 2 package, will debut in a 400-MHz speed grade followed by a 450-MHz device by the end of the year. The beefed up L2 caches will start at 512 kbytes and are planned in sizes up to 2 Mbytes.