TOKYO — NEC Corp. has crafted a novel approach to behavioral-synthesis design using a homegrown language based on C code. The company claims the approach can lop off a big chunk of design time and turn just about anyone schooled in C programming into a crack logic designer overnight.

NEC is not offering the language, called Cyber, to outside customers, though R&D executives at the company said its ultimate aim is to do so. For now, NEC is using the language for a portion of its internal logic design. Its announcement of Cyber is believed to be a trial balloon to gauge the industry's interest.

"There are no product plans yet, but chances are there will be," said Satoshi Goto, vice president and general manager of NEC's Components & Communications Media Research Laboratories (Kawasaki, Japan). "We expect to do 10 percent to 30 percent of new [logic] designs with this internally."

NEC said it developed Cyber as an answer to the deep-submicron design crunch that has befallen device engineers as they try to pack more functions on chip while shrinking the design cycle. The volume of data moving into the downstream design phases is becoming so immense as to test the limits of existing automated design tools, NEC officials said.

The hallmark of NEC's approach is that it uses the C language and C extensions instead of VHDL or Verilog, in effect allowing the development of hardware and software to overlap at several stages of their respective design flows. Specifically, C code can be interchanged between the program and the hardware-operation algorithm stage, between the assembler algorithm and the structural algorithm (register-transfer level), and between the final hardware description and the gate-circuitry stages, said Kazutoshi Wakabayashi, chief researcher for the NEC R&D group.

Using the Cyber behavioral-synthesis system, designers input their hardware-operation algorithms as software and use logic synthesis and automatic layout CAD software to generate LSI mask patterns. According to NEC, the approach yields detailed hardware structures in a fraction of the time incurred by conventional methods, giving the designer more time to evaluate the logic and alter the operation algorithms as necessary to improve performance.

Complex functions
Other claimed advantages of the system include the need for less circuitry real estate and the ability to add complicated functions normally reserved for firmware.

The ability to create descriptions of the number and type of functions, such as parallel operation and bit operation, in C is unique to the industry, NEC claims. "Most importantly this is done in C language, so that most people can write C code and it can automatically generate a chip," Wakabayashi said. "If the system can handle C language, it can be compiled into a C compiler or an FPGA."

Wakabayashi readily acknowledged that C language is usually "weak" in describing hardware in detail, but he said that NEC has developed a set of extensions that can handle finer descriptions and that the language can actually outperform other HDLs. "In the behavioral level, our extensions for the C language are much more powerful than VHDL, especially for very complicated timing circuits," he said. "For example, a 2,000-state machine can easily be described."

The language doesn't have to replace Verilog or VHDL but instead can be used in a mixed environment. "This tool is at a high level, so it can work with other tools in logic and physical design," Goto said.

NEC recently used its behavioral-synthesis system to design a 1.52-Gbit/second network-interface card (NIC) chip conforming to the Virtual Interface architecture. Wakabayashi said the design team was able to finish its high-level design in one week and to complete its functional design in an hour, while cutting its design time by an estimated 90 percent.

What's more doing hardware logic design with Cyber is claimed to require no special expertise; proficiency in C is the only real requirement. NEC's network-interface chip, for example, was designed by someone fresh out of college who "had no practical experience with logic design," Wakabayashi said. "We think this exemplifies how easy this is to learn."

Still, because the language is based on C, it cannot be used for the design of analog functions. That precludes its use for advanced system-on-silicon designs incorporating mixed-signal technology.

And getting the language into the hands of outside customers is still a question. Certain camps within NEC consider the language a competitive advantage for the company's internal chip-design teams, while others, such as NEC's ASIC division, view it as a trump card to attract new customers, officials said.

Another possible roadblock is the need to persuade the design community to learn yet another front-end design language. Goto said NEC expects a slow transition, even within its own ranks.

"We're changing our design standard to all C, but we have to educate people, and it is not easy to change people over to using new tools," he said.