At 40, the integrated circuit has come both to a point of maturity and a midlife crisis. No longer a fledgling snippet of silicon executing a single, simple function, today's integrated circuit is on the cusp of becoming a sophisticated system in its own right. But as the IC rises to the challenge of this new and broader role, it faces the need to change almost every aspect of both the technology and the business that now define it.

Specifically, the IC is about to be redefined in terms of what has been its physical makeup and the methodology by which it is designed. What's more, these changes are reshaping semiconductor companies at a time when that industry is seeing one of the most severe downturns in recent memory.

Chip makers view the shift to system-level silicon as a strange mix of opportunity and threat. On the one hand, process technology has opened the door to devices with 10 million or more transistors, creating the base capability of building a systems chip. On the other hand, a prolonged slump in semiconductor growth has raised the question of just what functions anyone wants or would pay for on such a superchip. At a time when chip and system prices are cratering, technology managers are asking themselves whether people really want more powerful computers, more digital devices to entertain them or keep them in ever-closer communication with the rest of the world.

This blend of technical capabilities and business uncertainties colors a somewhat anxious quest for the new frontier in systems-on-silicon.

"The last three years have been a period of lousy growth," said Hector Ruiz, president of Motorola's Semiconductor Products Sector (Phoenix, Ariz.). "Every time there has been [a downturn] like this the industry has gone through a shift. My view is the fundamental changes that will come out of these three years will be the most dramatic ones in the [history of the] semiconductor industry."

Ruiz believes that when the dust settles, two kinds of semiconductor companies will emerge: intellectual-property providers with an expertise in process technology and software to combine cores into system chips, and low-cost manufacturers with a high-volume business that helps amortize increasingly expensive wafer fabs.

According to Billy Edwards, vice president and director of strategic management and planning for Motorola's chip division, the system-on-chip opportunity is a defining one from a technology and a business perspective alike.

"System-on-chip is one of these areas where it's not just a technology decision, but a business decision of who we want to be and where we want to go," Edwards said. "The semiconductor industry is maturing to something more than silicon but it still has a long way to go. The trick is how do you put this all together. We are doing more alliances than ever before, and we are not done with partnerships yet."

The problem is, of course, defining which systems will drive tomorrow's chip business. Clearly, Intel Corp. will cling to its franchise in the 100 million-a-year PC business. What lies beyond that is guesswork, even for the most thoughtful EE or chief executive officer.

"I don't ever remember seeing a presentation 10 years ago that said cell phones, hard-disk drives and modems would be the predominant DSP end-equipment markets," said Tom Engibous, chief executive of Texas Instruments Inc. (Dallas). "They happen to be the three largest markets now, but I don't think they were on our radar back then."

Little surprise, then, if Engibous expresses some uncertainty over what the next key systems targets will be for TI. Digital subscriber-line devices may be one, he suggested, and motor control may be another. "The question is how many of a billion-plus motors will use DSPs as a control function," Engibous said. "I think the video space is where the biggest ifs are as far as how many of those platforms will be programmable vs. hardwired, and when."

Still, a common dictate is hitting every semiconductor supplier-the need to seek out the systems engineer. "We need good systems-level partners we can team up with," said Gene Frantz, a Fellow and DSP guru at TI. "It is nearly impossible to build staffs of talented people in each of the areas we want to pursue. We know how to build ICs well, but to build system-level ICs well we need partners."

"There are a lot of end-equipment areas we are working on that we haven't been public about," said Engibous. "We have a number of teams working on everything from print technology to communications and the consumer space."

"The way people work has changed," said Lew Counts, a longtime guru of analog technology and now head of advanced product marketing at Analog Devices Inc. (Norwood, Mass.). You can't come up with a good product without talking to customers and customers can't design a product without knowing how silicon works, he suggests. This newfound intimacy between customer and supplier results in incredibly fast turn time: a new design every year, and a million pieces delivered the first month, Counts pointed out.

While the semiconductor companies are reinventing themselves to pursue the system-chip opportunity, the underlying silicon itself is undergoing a radical redesign.

When Robert Noyce in California and Jack Kilby in Texas were developing the first integrated circuits, they employed metal, insulator and packaging techniques that became the basis for semiconductors for the next 40 years. "All these technologies are still in use today, but in 10 years we will replace them all," said Mark Melliar-Smith, the chief executive officer of Sematech (Austin, Texas).

The top gun of the consortium responsible for pushing the IC forward noted that new metals, new insulators, new packaging techniques-as well as new methods of lithography and a new wafer size-will all come into use in the next decade, completely revamping the integrated circuit as we know it today. Aluminum will give way to copper, novel low-k and high-k dielectric materials will become insulators at various gate and interconnect levels, and packaging will migrate from wire bonds to dense ball-grid arrays. And that's just a few of the changes.

"We are looking at some very non-incidental technologies over the next 10 years," said Melliar-Smith. "And the question is not just can you do them, but can you do them cost-effectively."

In the manufacturing realm, a whole new form of lithography, beyond today's optical methods, and a larger wafer size will come into play in the foreseeable future. "There are still some major uncertainties over all these technologies," said Melliar-Smith, ticking off five new lithographic methods being tested in cooperation with Sematech. "Simply spending more money is not the answer. These techniques pose problems that probe the limits of physics."

Making matters worse, the downturn in the semiconductor business, coupled with a steep investment curve for developing next-generation 300-mm wafer gear, has put the underlying capital-equipment industry in a crisis, added Melliar-Smith. "I am very concerned about what has happened in 300-mm equipment," he said. "Three years ago we drove the equipment industry hard, but we have not been able to get the pot of gold at the end of the road. We need to make sure we get to a win-win situation [between equipment and IC makers] in three years."

At the packaging level, "Wire bonding will crap out at 900 pins," said David Shepard, director of worldwide strategy and business development for TI's ASIC unit. "Beyond that it's probably flip chip, but flip chip is very expensive and a number of our customers will try to get to fewer pins rather than go to flip chip."

New methods
The most formidable aspect of the chip industry's midlife crisis can be expressed in two words: design reuse. That duo-and another often-coupled pair, intellectual property-point to a whole new and very necessary methodology shift that is reshaping the industry, the companies in it and the process of design itself.

"Design-productivity issues have emerged as the biggest stumbling block to achieving the process of advanced low-cost, high-performance ICs," said Bob Payne, vice president for strategic technology at VLSI Technology Inc. (San Jose, Calif.), in comments written for our editorial advisory board for this special issue. "In the ASIC world, leading-edge manufacturers can integrate 4 million to 6 million logic gates on a square-centimeter die, but the average new ASIC start is about one-tenth of this-in the 400,000- to 600,000-gate range. With today's process technologies running away from design technologies and the huge number of machine cycles which we must run to validate the hardware and perform software development, hardware prototyping-based design styles look like our best hope of bridging the design-productivity gap," Payne said.

Another member of our editorial advisory board, Tom Redfern, an analog guru and Fellow at National Semiconductor Corp. (Santa Clara, Calif.), sized up this key problem is a slightly different way. "The estimates are by the year 2001 or thereabouts we will be able to integrate from 50 million to 200 million transistors on a chip." That's the equivalent of 10 to 40 Pentiums on a single die, he added.

"The only practical way to approach this problem is through the reuse of large intellectual-property blocks," writes Redfern. "Not only must these blocks be reused, they also have to be synthesizable. That's not trivial and only a few companies are on a path to do it."

Aart de Geus, chief executive officer of EDA vendor Synopsys Inc. (Mountain View, Calif.), offered a formula to demonstrate the need for design reuse. De Geus starts by assuming a year-2000 challenge of designing a 12 million-gate ASIC. "With the current designer productivity at 100 (verified) gates per day, a 12 million-gate ASIC would require 500 person-years to develop," he writes. "Assuming fully loaded costs per engineer of $150,000 per year, the chip would cost $75 million to develop. Fewer than 10 percent of the ASICs produced in the world today can justify that kind of investment."

But the solution-reusable intellectual property-"requires a great deal of technical discipline and acumen . . . and causes the entire [semiconductor] value chain to be reevaluated," de Geus said. Nevertheless, "this driver will bring about the single biggest change in productivity and competition over the next five years."

"The problem [of reuse] will turn out to be much harder than I think we currently understand," said Stanford University's John Hennessy in his brief for our advisory board. "The initial attempts are not meeting with great success. In the end, I believe we'll make progress by becoming slightly less concerned about efficiency-in both performance and silicon area-and sacrifice [such] improvements in the name of time-to-market and functionality."

For David Ditzel, chief executive officer of CPU startup Transmeta Inc. (Santa Clara) and a lead developer of the Sparc architecture, design reuse is leading us to a new world where software reigns supreme. "The days of 100 percent hardware may be coming to an end as it will soon become possible to put processors of over 1,000 Mips in the corner of a chip," writes Ditzel in an advisory-board letter. "This means that many new product developments will become software projects, rather than hardware design projects."

Arturo Krueger knows the software issues well. As general manager of Motorola's Advanced Systems Technology Labs, he is charged with setting up a database repository of the company's silicon intellectual property. Krueger also imagines the ultimate software design system, one geared for the very complex world of car design.

It can costs billions of dollars to develop a car, in part because one group will develop a specification for a new vehicle and then break that down into subsystem specs that will be handed to suppliers, who in turn break it into components specs. "You are left with three or four generations of specifications floating around and none agree with the others," Krueger said in an interview in his Austin office.

When the specs change slightly, the subsystem designs shift, and that has an impact on the car design, generating enormous rework. "It would be nice if we could begin by defining something on a computer in a high-level language like C++ and share that with the suppliers and the subsuppliers," Krueger said. "The component developed in this way may be more expensive, but the overall car will not be."

In fact, Krueger has worked on such a project, which he dubs the Virtual Garage. He imagines it will ultimately encompass not only the electronic but even the electromechanical elements of the car. Imagine a simulation of a whole system-even just a whole drive train, with mechanical and electronic parts working in synch, designed, tested and qualified in simulation. "A lot of people thought we were crazy," he said.

But it may be just such craziness that engineers and technology managers will need if they are to surmount the crises facing the semiconductor industry today. At 40, the IC is mature enough to be not just silicon but system too. Now it is re-architecting itself both as a physical design and a design methodology to meet the challenges of this new level of sophistication.

Much hard work lies ahead in implementing these changes. An even greater job lies before us in dreaming up the next level of applications to harness this technology, enriching all our lives.

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