LEUVEN, Belgium — Frontier Design, based here, has introduced its A/RT (Algorithm to Register Transfer) Library and A/RT Builder, a family of EDA tools that can be used together to automate the conversion of floating-point C and C++ language algorithms to bit-accurate, fixed-point VHDL and Verilog descriptions.

The A/RT Library provides a set of C++ data classes and operators that cater to fixed-point arithmetic while accounting for quantization and overflow effects. A/RT Builder automatically converts algorithms rendered in fixed-point format with the aid of A/RT Library to synthesizable VHDL or Verilog. Test benches automatically generated by A/RT Builder can be used to compare C simulation with hardware description-language simulation to verify accuracy.

Herman Beke, chief executive officer of Frontier, said, "The vast majority of intellectual property is literally "imprisoned" in the form of floating-point C algorithms that have been developed over the years." He added, "Until now there have been no EDA tools that support this conversion. Our aim with the A/RT family of tools is to liberate this legacy IP and make it accessible and reusable."

The license fee for A/RT Builder is $12,000. A/RT Library costs $1,000 for a single-user license.