SAN FRANCISCO — Analog/RF EDA provider Berkeley Design Automation Inc. has joined Cadence Design Systems Inc.'s Connections program and integrated its PLL Noise Analyzer noise analysis tool with Cadence's Virtuoso analog design environment, the company said Thursday (Sept. 8).
"Membership in the Cadence Connections program ensures us a smooth production design flow for our mutual customers," said Dr. Ravi Subramanian, Berkeley Design Automation president and CEO, in a statement.
Berkeley Design Automation (Santa Clara, Calif.), a relatively new company (founded in 2003), introduced PLL Noise Analyzer in May. The tool, which analyzes noise and jitter for PLLs, is based on stochastic, nonlinear circuit analysis technology developed by Berkeley Design Automation founder and Chief Technology Officer Amit Mehrotra as part of his doctoral research at the University of California at Berkeley.
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