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EDA startup speeds IC optimization
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EE Times


SANTA CRUZ, Calif. — Promising a new class of IC optimization tools, startup Athena Design Systems this week is announcing its plans to provide concurrent analysis and optimization tools that run alongside IC routing. By using a distributed multiprocessing capability, the company claims to significantly speed design closure time.

Athena (Santa Clara, Calif.) was founded in 2003 by Dimitris Fotakis, an IC extraction expert who previously was a co-founder of AmmoCore Technology. That company closed its doors last year after some $33 million in venture capital. But Fotakis, who left AmmoCore in 2003, believes he's got a winner with Athena.

"My idea was that the multiprocessing infrastructure is ready to be used in EDA," Fotakis said. "The premise behind Athena was that in order to get EDA to the point where it could use the [multiprocessing] computing platform, we really had to work hard on the foundation layer, and create the right hooks and database interfaces."

Athena is planning a product release around this year's Design Automation Conference in July. The company has raised $4.2 million and has 14 employees, including 6 former AmmoCore engineers. Last year Athena tapped John Murphy, a 12-year veteran of Cadence Design Systems, to serve as its CEO, and more recently Athena added EDA luminary and investor Jim Hogan to its board of directors.

Athena's technology takes output from placement and pre-route optimization, and figures out how to "divide and conquer" the chip by distributing jobs for detailed routing. "We create tiles that are independent of one another, so the router thinks it's working on a complete job. We then stitch it back together," Murphy said.

Over a network of 20 workstations, Murphy said, Athena has realized a 10-fold speedup in routing. The real win, he said, comes with the analysis and on-the-fly optimization these speeds make possible. "Most optimization today is done with estimates, but we're working with the detailed router and optimizing with real wires," he said.

Athena today offers analysis and optimization for timing and signal integrity. There's no dynamic power analysis, but Athena can read nominal power numbers from cell libraries and replace cells based on that. Optimizations include cell resizing, re-routing, and re-buffering, with the correct ECO created for the customer.

Athena has developed a database designed to work with multiprocessing, and the company has its own 3D extraction engine and delay calculation tools. Timing analysis is licensed from Parallax Software, which, according to Murphy, promises a close correlation with Synopsys' market-leading PrimeTime analyzer.

Matthias Voigt, general manager at NEC Electronics GmbH, has been helping Athena with test cases and trials. He said the company offers "a unique parallel processing scheme" that will help increase productivity by supporting compute farms. Athena's timing optimization is ready for a beta launch today, he said, and it works well with all available third-party routers.

But Athena doesn't have its own placement and routing tools, and must work with those from Synopsys, Cadence Design Systems, or Magma Design Automation. Representatives from these three large EDA vendors say they're already offering, or are working on, multiprocessing capabilities for IC physical design. Mentor Graphics' Calibre verification suite also uses distributed multiprocessing.

Murphy and Fotakis are confident they'll maintain an edge. "Our data model and distributed multiprocessing is pretty disruptive technology, and is difficult for anyone to achieve in an incremental fashion," said Fotakis. "From our point of view, we are ahead of the major vendors with our distributed and concurrent system."






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