For both chips and embedded software, verification consumes much, if not most, of the design cycle. At the recent Design and Verification Conference, the message was clear: The way to break the verification bottleneck is to improve the quality of designs and reduce bugs.

It's unrealistic to think engineers can design without bugs. But it is possible to envision changes that might reduce their number.

One place to start is with a clear, executable specification that drives the design process. Today, Matlab or C/C++ models are often used as a starting point, but they are usually thrown away as implementation begins. SystemC offers the potential of someday linking to downstream implementation, and of representing embedded software as well as hardware. But first, designers need credible tools and an understanding of how to write good SystemC code.

It will also help to express design intent in some formal, communicable way. This can be done through properties or high-level requirements. Putting assertions in HDL code is late in the process; it would be better to start with design intent before beginning any implementation.

If there was a formal model of the design, engineers could formally prove properties or requirements as the modeling and implementation proceeded, thus avoiding bugs. The trick is to make this methodology usable by rank-and-file designers without PhDs in mathematics. Also, verification people should be involved in the earliest stages of design. Designers must consider verification needs from the outset and take more responsibility for verification.

A final part of the puzzle is how to measure design quality. It's not just a low bug count, high functional coverage or first-time silicon success, although those are important. It's also a question of how smoothly the design process went and how closely the design matches its original intention.

The sixth annual International Symposium on the Quality of Electronic Design, to be held March 21-23, is an excellent venue for exploring these issues in IC design. But design quality is just as pressing for embedded software, which can end up as the biggest verification problem of all.

The Art of Design column offers opinions and perspectives on the technology, techniques and business of electronics design. Its subject matter covers design automation, test, packaging, boards and silicon. Suggestions or comments may be sent to rgoering@cmp.com.