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ISS turns into Amphion; Palmchip, inSilicon in deal
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Integrated Silicon Systems Ltd. (ISS; Belfast, Northern Ireland) has changed its name to Amphion Semiconductor Ltd. and released a semiconductor core capable of real-time decompression of MPEG-2 videostreams up to the high-definition 4:2:2@HL profile.

Amphion's CS6650 core, an application-specific virtual component (ASVC), takes up little more than a square millimeter of die area when created in a contemporary process technology, said director of marketing Jordan Selbourn.

The core includes a memory controller and supports direct connection to external SDRAM, which will avoid the on-chip bus bottlenecks found in other core solutions, Amphion said.

"Using Amphion's off-the-shelf MPEG-2 video decoder core, digital TV systems developers can avoid the need to redesign what is usually delivered as an application-specific standard product," said Stephen Farson, vice president of engineering. "The CS6650 will help insure that end products get to market faster. "

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Intellectual property (IP) vendor inSilicon Corp. (San Jose, Calif.) has announced that system-on-chip (SoC) platform design group Palmchip Corp. is now a VAR for inSilicon's communications technologies, which will be integrated into Palmchip platform solutions. Palmchip will market and sublicense inSilicon's industry-leading portfolio of communications IP together with Palmchip's products to provide applications-targeted SoC platforms.

Palmchip's flagship CoreFrame integration architecture allows the plug-and-play of multisourced IP. Within the CoreFrame architecture, Palmchip's PalmPak SoC development platform contains the peripheral functions required for a basic SoC-the CoreFrame architecture with PalmChannel controller and CPU-MChannel, DMA Channel, Flash/SDRAM memory controller, communications I/O, and basic HW/SW verification test bench.

Visit www.insilicon.com and www.palmchip.com.

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The StarCore Technology center-the joint Motorola-Agere Systems effort-is holding seminars on the SC100 family of DSP cores at select industry conferences.

The three-hour seminar, designed to improve attendees' knowledge of the next-generation StarCore DSP core technology, features an applications viewpoint of how the SC140 and SC110 address efficient compilability, high performance, low power consumption and compact code density.

The seminars will be at: DesignCon 2001-Jan. 29-Feb. 1, Santa Clara, Calif.; Society for Technical Communication-March 17, Atlanta; Signal Processing Advances in Wireless Communications-March 20-23, Taoyuan, Taiwan; Embedded Systems-April 9-13, San Francisco; ICASSP 2001-May 7-11, Salt Lake City; ICC 2001-June 11-15, Helsinki, Finland; and Embedded Systems East-July 9-11, Chicago.

To register, e-mail jennifer.owens@motorola.com with the seminar name, your name, title, company name and phone number.





The views and opinions expressed in this column are strictly those of the author and should not be taken as an editorial position of EE Times or any of its other editors, publications or Web sites.


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