Moderator Gary Smith, Dataquest's chief EDA analyst, hammered away at two myths: "patents encourage technical innovation" and "design-cycle times are shrinking." Smith said the industry's vigilance in enforcing patents has squelched, not sparked, innovation. "In the 1980s, it used to be that most of these [design] disputes were settled quickly and quietly behind the scenes and only went to trial if it was a completely blatant rip-off," he said. "That just isn't the case any longer. Patents today are used to stifle competition."

Addressing design-cycle times, Smith brought out a Dataquest chart that showed that over the last five years design-cycle times for all sectors except automotive electronics have stayed level at nine months to a year.

The C/C++ myth went to Steve Schulz, co-chairman of the Accellera standards body and CAD strategy manager at Texas Instruments Inc. "I predict C will be as popular for hardware design as it was 20 years ago when we decided to create HDLs," Schulz summed up.

Design consultant Paul Weil took on the myth that system-on-chip designs "are simple-just like putting together a pcb." He said, "Managers wanted to believe that it would be simple: mark up a design on paper, get some parts, hook them up, run tests, fix any problems and you are done. It just isn't nearly that simple." Weil said that to complete an SoC design requires great tools and talented hardware engineers. But hardware engineers, said Weil, have to overcome an "I can do it better" attitude to make SoC possible.

Gabe Moretti, EDA and technology editor at EDN, grappled with another questionable notion: that "reconfigurable computing will replace ASICs." Moretti pointed out that the ASIC market is not likely to cannibalize profitable businesses and that the ASIC's versatile size, package, performance, power and price advantages will allow the business to survive into the foreseeable future.

ISD publisher and EE Times columnist Ron Wilson attacked the myth that mask charges are increasing so rapidly they will price everyone out of the market. In fact, said Wilson, research from Dataquest shows that the mask cost per gate is actually shrinking, from $0.013 per gate at 0.18 micron to $0.008 per gate at 0.13 micron. "Huge costs will only be to baselines," said Wilson, pointing out that practices like using FPGA prototypes instead of masks and using multidesign mask sets will ensure that mask costs won't make the semiconductor sector implode-at least not soon.

Dataquest senior technical software analyst Laurie Balch tackled the last myth: "Web-based design is the wave of the future." Balch pointed out several submyths perpetuated by vendors and users, including the belief that the Internet will increase the size of the user market, that high bandwidth is pervasive and that everything on the Internet is free or at least cheap. Balch also took pains to dispel a new myth-that the Internet has failed designers-by pointing out that the Net has aided engineers in communication, downloading up-to-date data books and evaluating intellectual property.